FOCUS Enhancements FS453, FS454, FS455, FS456 - page 19

FS453/4 AND FS455/6 DATA SHEET: HARDWARE REFERENCE

Pin

Name FBGA

Pin

Number

PQFP Pin

Number Type/Value Pin Function Description

Video Outputs

DAC_A A8 68 analog video Video output. As programmed by the

DAC_CNTL (9Eh) register.

DAC_B A7 70 analog video Video output. As programmed by the

DAC_CNTL (9Eh) register.

DAC_C A6 72 analog video Video output. As programmed by the

DAC_CNTL (9Eh) register.

DAC_D A9 66 analog video Video output. As programmed by the

DAC_CNTL (9Eh) register.

Voltage Reference

RSVD1 76 Reserved. Not internally connected.

FS_ADJ B3 78 549Ω or

1.1kΩ Full Scale Adjust. A resistor connected

between FS_ADJ and ground sets the current

range of the D/A converters. Use 549Ω for a

37.5Ω load (common) or 1.1kΩ for a 75Ω load.

Note that there is a 75 Ohm terminating

resistor in consumer televisions.

COMP B4 75 0.1 µF Compensation. A 0.1µF capacitor must be

connected between COMP and VDD_DA.

VBIAS A4 77 100Ω/0.1µF Voltage Bias Decoupling. An optional series

100Ω/0.1µF capacitor can be connected

between VBIAS and VDD_DA to reduce noise

at the D/A outputs. Otherwise, leave

disconnected.

Serial Port

ALT_ADDR H13 48 TTL input

(internal pull

down)

Serial data address select. Selects the 7-bit

serial bus address:

ALT_ADDR = H: 0x6A

ALT_ADDR = L: 0x4A

SDATA K13 44 TTL I/0

(open drain) Serial data. Data line of the serial port.

Connect to GCC serial data pin.

SCLK K12 45 TTL Input Serial clock. Clock line of the serial port.

Connect to GCC serial clock pin.

JANUARY, 2005, VERSION 3.0 19 COPYRIGHT ©2003-4 FOCUS ENHANCEMENTS, INC.

FOCUS Enhancements Semiconductor

Contents

Main FS453/4 and FS455/6 PC-to-TV Video Scan Converter Data Sheet Guides ; The FS453/4 and FS455/6 Hardware Reference is for The FS453/4 and FS455/6 Software/Firmware Reference is for programmers. Table of Contents, Figures & Tables Document Overview 1. Introduction 1.1 General Description 1.2 How does it work? 1.2.1 SDTV Output 1.2.2 HDTV Output 2. Architectural Overview 2.1 Inputs 2.1.1 Input to Output Conversion Matrix 2.2 Color Space Converter 2.3 Patented 2D Scaler 2.4 Patented 2D Flicker Filter 2.5 FIFO 2.6 Post (Horizontal Up) Scaler 2.7 Encoder and Inverse Color Space 2.8 Bi and Tri-Level Sync Insertion (HDTV) 2.12 Serial Control Interface 2.13 Sync Timing Generator 2.14 Input Synchronization 3. Technical Highlights 3.1 Scaling 3.1.1 Video Scaler Challenges 3.1.2 FS453 Solution 3.2 Flicker Reduction 3.2.1 Flicker Filter Challenges 3.2.2 FS453 Solution 3.3 Video Encoding 3.3.1 Encoding Challenges 3.3.2 FS453 Solution 4. Scaling and Positioning Notes 4.1 Vertical Scaling Figure 5: VTOTAL and VACTIVE ratios must match 4.2 Horizontal Scaling 4.3 Vertical and Horizontal Position 5. Pin Assignments Pin Name Pin Name Pin Name Pin Name FS455/6 88 FBGA Bottom View Figure 8 FBGA Pin Diagram 5.1 FS453 GCC Pin Mapping 5.2 Pin Descriptions Page Page Page 6. Control Register Function Map 6.1 Register Reference Table Page Page 7. Specifications 7.1 Absolute Maximum and Recommended Ratings 7.2 Electrical Characteristics Page 7.3 Switching Characteristics 8. Mechanical Dimensions 8.1 80-Lead PQFP Package Page 9. Component Placement 9.1 Power/Ground 9.1.1 Power 9.1.2 Ground 9.2 DIGITAL SIGNALS 9.2.1 Digital Signal Routing 9.2.2 Video Inputs 9.3 ANALOG SIGNALS 9.3.1 Video Output Filters Page 9.4 CLOCK/OSCILLATOR 9.4.1 Reference Crystal Oscillator 9.4.2 FS453 Pixel Clock 9.4.3 Pixel Clock Mode GCC FS453 GCC 9.5 EMI Case Study 9.6 Solder Re-flow Profiles -flow Profile IR Re- IR Re IR Re -flow Profile IR Re- flow Profile 10. Revision History 11. Order Information Critical Applications Policy FOCUS Enhancements, Inc.