Freescale Semiconductor Block Guide, EETX4K Index

Block Guide — S12EETX4KV0 V00.04

Index

–A–

ACCERR 21

–B–

Background Debug Mode 40

BLANK 21

–C–

CBEIE 18

CBEIF 20

CCIE 18

CCIF 20

CMDB 22

Command Write Sequence 11

–E–

EDIV 17

EDIVLD 17

EPDIS 19

EPOPEN 19

EPS 19

–I–

Illegal EEPROM Operations 38

–K–

KEYACC 19

–P–

PRDIV8 17

PVIOL 21

–R–

Registers

EADDR 23

ECLKDIV 17

ECMD 21

ECNFG 18

EDATA 23

EPROT 19

ESTAT 20

Resets 41

RNV 19

–S–

Security 40

Stop Mode 40

–W–

Wait Mode 40

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Contents

Main EETX4K Block Guide V00.04 Page Table of Contents Section 1 Introduction Section 2 External Signal Description Section 3 Memory Map and Registers Section 4 Functional Description Page List of Figures Page List of Tables Page Page Page Section 1 Introduction 1.1 Overview 1.1.1 Glossary Command Write Sequence 1.2 Features EETX4K Page Section 3 Memory Map and Registers 3.1 Overview 3.2 Module Memory Map Figure 3-1 EEPROM Memory Map Page 3.3 Register Descriptions 3.3.1 ECLKDIV EEPROM Clock Divider Register 3.3.2 RESERVED1 3.3.3 RESERVED2 3.3.4 ECNFG EEPROM Configuration Register 3.3.5 EPROT EEPROM Protection Register 3.3.6 ESTAT EEPROM Status Register 3.3.7 ECMD EEPROM Command Register 3.3.8 RESERVED3 3.3.9 EADDR EEPROM Address Registers 3.3.10 EDATA EEPROM Data Registers Page Section 4 Functional Description 4.1 EEPROM Command Operations 4.1.1 Writing the ECLKDIV Register Page Figure 4-1 Determination Procedure for PRDIV8 and EDIV Bits 4.1.2 Command Write Sequence 4.1.3 EEPROM Commands Page Page Page Page Figure 4-7 Example Sector Modify Command Flow 4.1.4 Illegal EEPROM Operations Page 4.2 Wait Mode 4.3 Stop Mode 4.4 Background Debug Mode 4.5 EEPROM Module Security 4.5.1 Unsecuring the MCU in Special Single Chip Mode via the BDM 4.6 Resets 4.6.1 EEPROM Reset Sequence 4.6.2 Reset While EEPROM Command Active 4.7 Interrupts 4.7.1 Description of EEPROM Interrupt Operation Page Index