Hitachi HDS723020BLA642 manual Command register, Device Control Register, Device Register

Models: HDS723020BLA642

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7K200 SATA OEM Specification

11.2 Command register

This register contains the command code being sent to the device. Command execution begins immediately after this register is written. The command set is shown in “Table 40 Command set” on page 74.

All other registers required for the command must be set up before writing the Command Register.

11.3 Device Control Register

Device Control Register

7

-

6

-

5

-

4

-

3

1

2

SRST

1

-IEN

0

0

Table 25 Device Control Register

Bit Definitions

 

SRST (RST)

Software Reset. The device is held reset when RST=1. Setting RST=0 reenables the device.

 

The host must set RST=1 and wait for at least 5 microseconds before setting RST=0, to

 

ensure that the device recognizes the reset.

-IEN

Interrupt Enable. When IEN=0, and the device is selected, device interrupts to the host will

 

be enabled. When IEN=1, or the device is not selected, device interrupts to the host will be

 

disabled.

11.4 Device Register

Device Register

7

-

6

L

5

-

4

0

3

HS3

2

HS2

1

HS1

0

HS0

Table 26 Device Register

This register contains the device and head numbers.

Bit Definitions

 

L

Binary encoded address mode select. When L=0, addressing is by CHS mode. When L=1,

 

addressing is by LBA mode.

HS3,HS2,HS1,HS0

The HS3 through HS0 contain bits 24-27 of the LBA. At command completion, these bits

 

are updated to reflect the current LBA bits 24-27.

11.5 Error Register

Error Register

7

CRC

6

UNC

5

0

4

IDNF

3

0

2

ABRT

1

TK0NF

0

AMNF

Table 27 Error Register

This register contains status from the last command executed by the device, or a diagnostic code.

At the completion of any command except Execute Device Diagnostic, the contents of this register are valid always even if ERR=0 in the Status Register.

Following a power on, a reset, or completion of an Execute Device Diagnostic command, this register contains a diagnostic code. See “Table 31 Diagnostic Codes” on Page 51 for the definition.

Bit Definitions

 

ICRCE (CRC)

Interface CRC Error. CRC=1 indicates a CRC error has occurred on the data bus during a

 

Ultra-DMA transfer.

UNC

Uncorrectable Data Error. UNC=1 indicates an uncorrectable data error has been

 

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Hitachi HDS723020BLA642 manual Command register, Device Control Register, Device Register, Error Register