System Overview | HP dc7800 specification

System Overview

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Technical Reference Guide

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HP dc7800 manual System Overview

Contents

Technical Reference Guide October Technical Reference Guide Contents Input/Output Interfaces Processor/Memory SubsystemSystem Support Power and Signal Distribution Integrated Graphics Subsystem System Bios Error Messages and Codes Index About this Guide Additional Information SourcesModel Numbering Convention Online Viewing Introduction Serial Number Notational ConventionsSpecial Notices Values Common Acronyms and Abbreviations Acronyms and Abbreviations Acronym or Description CMC CmosCPQ CPU Escd FifoFPM FPU Acronyms and Abbreviations Acronym or Abbreviation Description PCA PCIPCI-E PCM Sgram SimdSimm Smart VAC VDCVesa VGA System Overview Introduction Features 4GB 8GB Feature Difference Matrix by Form FactorSodimm Dimm Function System ArchitectureArchitectural Differences By Form Factor HP Comapq dc7800 Business PC Architecture, Block diagram Intel Processor Support Components Function ChipsetChipset Components and Functionality Support Components System MemorySupport Component Functions Component Name Function Mass Storage Serial and Parallel InterfacesUniversal Serial Bus Interface Network Interface Controller Graphics Subsystem Audio SubsystemIntegrated Graphics Subsystem Statistics Integrated Graphics Controller Specifications Environmental Specifications Factory ConfigurationPower Supply Electrical Specifications Parameter Operating Non-operating Physical Specifications Parameter Usdt SFF CMT Diskette Drive Specifications Parameter Measurement Optical Drive Specifications DVD/CD-RW SuperMultiParameter CD-RW/DVD-ROM Combo LightScribe Combo Hard Drive Specifications Parameter 80 GB 160 GB 250 GB System Overview Processor/Memory Subsystem Intel Processors Intel Processor Overview Processor Changing/Upgrading Supported ProcessorsClock Form Memory Subsystem Memory Upgrading Memory Mapping and Pre-allocationMemory Socket Loading Channel a Channel B Socket Socket 2 Socket 4 Total System Memory Map for maximum of 8 gigabytes PCI Bus Overview PCI 2.3 Bus Operation PCI Component Configuration Access PCI Bus PCI Component Function # Device # Wired to PCI Express Bus Operation Software/Driver LayerTransaction Protocol Layer PCI Bus Mastering Devices PCI Power Management Support Option ROM MappingPCI Interrupts Link Layer PCI 2.3 Bus Connector Pinout PCI ConnectorsPCI 2.3 Connector PCI Express Connectors PCI Express Bus Connector Pinout Apic Mode System ResourcesInterrupts Mode Direct Memory Access Connector PCI slot 1 PCI slot 2 PCI slot 3PCI Interrupt Distribution System Interrupts System Board Real-Time Clock and Configuration Memory Clearing Cmos Configuration Memory Cmos Map System ManagementStandard Cmos Locations Security Functions Power-On / Setup Password Setup PasswordCable Lock Provision Interface Security Power Management Smart Cover Lock OptionalAcpi Wake-Up Events Acpi Wake-Up Event System Wakes From System Status PowerLED Beeps Action Required System StatusThermal Sensing and Cooling System Operational Status LED Indications Register Map and Miscellaneous Functions System I/O Map System I/O Map Gpio FunctionsICH9 Functions Controller Functions Input/Output Interfaces Pin Description Pin Sata Connector PinoutSata Interface Pata Interface Pin Slim IDE Connector PinoutPin Signal Diskette Drive Interface Pin Diskette Drive Connector Pinout Pin Signal Description DB-9 Serial Connector Pinout Serial Interface Standard Parallel Port Mode Enhanced Parallel Port ModeExtended Capabilities Port Mode Parallel Interface Pin Signal Function Parallel Interface ConnectorDB-25 Parallel Connector Pinout Keyboard/Pointing Device Interface Keyboard Interface Operation Keyboard/Pointing Device Interface Connector Keyboard/Pointing Device Connector PinoutPointing Device Interface Operation Data USB Connector USB Connector LocationController Signals USDT, SFF Form Factors CMT Form Factor Universal Serial Bus Interface USB Connector Pinout USB Cable DataUSB Cable Length Data USB Color Code Audio Subsystem Functional Block Diagram Audio Subsystem Audio Multistreaming HD Audio ControllerHD Audio Link Bus ADC/DAC Audio SpecificationsHD Audio Subsystem Specifications Network Interface Controller LAN I/F NIC Alert Standard Format Support Power Management SupportWake-On-LAN Support NIC Connector NIC SpecificationsNIC Specifications Parameter Compatibility standard orprotocol Integrated Graphics Subsystem Q35 IGC, Block diagram Functional Description Sdram Installed Maximum Memory Allocation IGC Standard 2D Display Modes Resolution Maximum Refresh Rate Analog Digital Monitor Display Modes Upgrading DB-15 Monitor Connector Pinout Monitor ConnectorsAnalog Monitor Connector Digital Monitor Connector Integrated Graphics Subsystem Power Distribution Usdt Power Distribution SFF Power Distribution Usdt 135-Watt Power Supply Unit Specifications SFF 240-Watt Power Supply Unit Specifications Min Range Current Max Surge Tolerance Loading Ripple Range or Min Current Max Surge Tolerance Loading Ripple CMT Power DistributionCMT 365-Watt Power Supply Unit Specifications Shows the power supply cabling for CMT systems Energy Star Compliancy Power Control Power ButtonPower Button Actions Pressed Power Button Results Power Button Actions Power LED Condition Wake Up Events Wake-On-LAN System Power States Power Transition OS RestartState System Condition Consumption To S0 by Required Signal Distribution CR1 +5 VDC LED System Board Component Designations Power and Signal Distribution System Bios Changeable Splash Screen ROM FlashingUpgrading Boot Functions Boot Device OrderNetwork Boot F12 Support Memory Detection and Configuration Visual power LED Audible speaker Meaning Boot Error CodesBoot Error Codes Client Management Functions INT15 Function ModeClient Management Functions Temperature Status Drive Fault PredictionSystem ID and ROM Type System ID Numbers Smbios Type Data USB Legacy Support Management Engine Functions Index Numerics Index