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Model | Page: 6 of 15 |
First InternalDIPSwitch (SW4)Settings
NOTE: First internal DIP switch (SW4) changes only take effect after powering down the card rack; resetting the MCU is insufficient.
Position Number
Name
Left | 1 | |
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| 2 | T1 Clock Master |
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| 3 | T1 Synchronous |
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| 4 | E1 Select |
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| 5 | Sampling Rate Select |
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| 6 | Reserved |
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| 7 | Reserved |
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Right | 8 | Reserved |
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Set the
Open | The VNA generates the Card Rack’s backplane |
| Bus Clock Master. |
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Closed | The VNA receives the Card Rack’s backplane |
| Clock Slave. |
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Set the T1 Clock Master switch according to the following table:
Open | The VNA uses its received T1 signal’s timing to generate its transmitted T1 signal’s timing. |
| The VNA is a T1 Clock Slave. |
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Closed | The VNA uses the Card Rack’s backplane |
| signal’s timing. The VNA is the T1 Clock Master. |
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