Counter
Table 11. Counter specifications
Counter type | 82C54 |
|
Configuration | 3 down counters, 16 bits each | |
Counter 1 - User counter | Source: | Programmable external (Ctr 1 Clk) or 100 kHz internal source |
| Gate: | Available at connector (Ctr 1 Gate), pulled to logic high via 10K |
| resistor (See Note 2) | |
| Output: | Available at connector (Ctr 1 Out) |
Counter 2 - ADC Pacer Lower Divider | Source: | Programmable, 1MHz or 10 MHz internal source |
| Gate: | Available at connector (A/D Pacer Gate), pulled to logic high |
| via 10K resistor. | |
| Output: | Chained to Counter 3 Clock |
Counter 3 - ADC Pacer Upper Divider | Source: | Counter 2 Output |
| Gate: | Internal |
| Output: | Programmable as ADC Pacer clock. Available at user connector |
| (ADC Pacer out) | |
Clock input frequency | 10 MHz max | |
High pulse width (clock input) | 30 ns min |
|
Low pulse width (clock input) | 50 ns min |
|
Gate width high | 50 ns min |
|
Gate width low | 50 ns min |
|
Input low voltage | 0.8 V max | |
Input high voltage | 2.0 V min |
|
Output low voltage | 0.4 V max | |
Output high voltage | 3.0 V min |
|
Crystal oscillator frequency | 10 MHz |
|
Frequency accuracy | 50 ppm |
|
Note 2: If you are not driving the gate of User Counter 1, it is strongly recommended that it be connected to +5V (VDD).
Power consumption
Table 12. Power consumption specifications
5V quiescent
150 mA typical, 170 mA max
Miscellaneous
Table 13. Miscellaneous specifications
+5 Volts | Available at I\O connector (+5V Power) | |
| Protected by resettable fuse: |
|
| Hold current: | 350 mA max @ 20 °C still air |
| Trip current: | 700 mA min @ 20 °C still air |
| Trip and recovery time: | 100 mS max |
| On resistance: | 1.3 Ohms max |
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