82543GC Gigabit Ethernet Controller Specification Update
When the size of a received packet exceeds the space in the packet buffer memory, the 82543GC Gigabit Ethernet Controller will drop the packet. This behavior is normal and is not affected by the erratum.
Implication: Software cannot directly access packet buffer memory. Such accesses are typically performed only for diagnostic purposes.
Workaround: It may not be possible to prevent the problem, requiring software to screen for packets that exceed maximum Ethernet frame size. When such a packet is found, software should reset the device.
In addition, a combination of techniques may be required to effectively reduce occurrences:
(a.) Place the device on a
(b.) Increase allocation of buffers and receive descriptors to start.
(c.) Enable flow control.
Status: Intel resolved this erratum in the A1 stepping of the 82543GC Gigabit Ethernet Controller.
21. Receive Packet Loss in 100Mb Half-Duplex Operation
Problem: | When the 82543GC Ethernet Controller is operating in |
| dropped following a collision with reception of a very short collision fragment. In this situation, a portion of the |
| preamble from the collision fragment gets appended to the incoming good packet. The good packet will then be |
| dropped because it has an invalid CRC. It will also be likely not to pass through an address filter. |
| This erratum is affected by the link partner’s behavior after collisions. The problem may not be seen with some |
| link partners, particular those that are not in strict IEEE compliance with respect to collisions. |
Implication: | The 82543GC Gigabit Ethernet Controller cannot be used in |
Workaround: | None. |
Status: | Intel resolved this erratum in the A1 stepping of the 82543GC Gigabit Ethernet Controller. |
22. TNCRS Statistic Register Has Live Count in Full-Duplex Mode
Problem: The Transmit with No Carrier Sense Statistic (TNCRS) has no meaning in
Implication: The TNCRS counter is defined to indicate the number of
Workaround: Software should ignore the TNCRS statistic in
Status: Intel does not plan to resolve this erratum in a future stepping of the 82543GC Gigabit Ethernet Controller.
23. Receive IP Checksum Offload Disabled
Problem: When Intel resolved Erratum #15, “Incorrect Checksum Calculation and Indication,” it was not possible to resolve a problem affecting receive IP checksums. To ensure against user problems, the receive IP checksum offload function was completely disabled.
Implication: The 82543GC controller will ignore the IP Checksum Offload Enable Bit (RXCSUM.IPOFL). IP Checksum Error Bits in the receive descriptors (RDESC.ERRORS Bit 6) will always read “0”. This erratum does not affect any other checksum calculation.
Workaround: None. Receive IP checksums should be calculated in software.
Status: Intel does not plan to resolve this erratum in a future stepping of the 82543GC Gigabit Ethernet Controller.
24. EEPROM Initializes Software Defined Pins Incorrectly
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