Serial Port TIMING-SHIFT Register Mode, Clcl | Intel 83C51FA

AUTOMOTIVE 80C51FA/83C51FA

SERIAL PORT TIMING-SHIFT REGISTER MODE

Test Conditions: TA e b40§C to a125§C; VCC e 5V g10%; VSS e 0V; Load Capacitance e 80 pF

	Symbol	Parameter	12 MHz Oscillator		Variable Oscillator		Units
	Symbol	Parameter	Min	Max	Min	Max	Units
			Min	Max	Min	Max
	TXLXL	Serial Port Clock Cycle Time	1		12TCLCL		ms
	TQVXH	Output Data Setup to Clock	700		10TCLCLb133		ns
		Rising Edge
	TXHQX	Output Data Hold after	50		2TCLCLb117		ns
		Clock Rising Edge
	TXHDX	Input Data Hold After Clock	0		0		ns
		Rising Edge
	TXHDV	Clock Rising Edge to Input		700		10TCLCLb133	ns
		Data Valid

SHIFT REGISTER MODE TIMING WAVEFORMS

				270501 ±15

EXTERNAL CLOCK DRIVE
Symbol	Parameter	Min	Max	Units
1/T CLCL	Oscillator Frequency	3.5	16	MHz
TCHCX	High Time	20		ns
TCLCX	Low Time	20		ns
TCLCH	Rise Time		20	ns
TCHCL	Fall Time		20	ns

EXTERNAL CLOCK DRIVE WAVEFORM

270501 ±16

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Image 12

Intel 83C51FA Serial Port TIMING-SHIFT Register Mode, Shift Register Mode Timing Waveforms, External Clock Drive, Clcl

Contents

EVENT-CONTROL Chmos SINGLE-CHIP BIT Microcontroller Memory Organization Automotive 80C51FA/83C51FA 80C51FA/83C51FA Product Options To + Extended AutomotiveTo + Extended PIN Descriptions Port Pin Alternate Function Oscillator Characteristics P3.7 RD external data memory read strobe Idle Mode Power Down ModeOnce Mode Status of the External Pins during Idle and Power Down Symbol Parameter Min Typ Max PdipXTAL, RST Symbol Parameter Min Typ Max Unit Test Conditions RrstRST Pulldown Resistor 100 225 CIO ICC vs Frequency Explanation of the AC Symbols External Memory Characteristics External Program Memory Read Cycle External Data Memory Read CycleExternal Data Memory Write Cycle Serial Port TIMING-SHIFT Register Mode Shift Register Mode Timing WaveformsExternal Clock Drive External Clock Drive Waveform Datasheet Revision History AC Testing INPUT, Output Waveforms Float Waveforms