Signal Description
72 Datasheet, Volume 1
6.10 Power Sequencing Signals

Table 6-12. Power Sequencing Signals

Signal Name Description Direction/
Buffer Type
SM_DRAMPWROK SM_DRAMPWROK Processor Input: Connects to PCH
DRAMPWROK. I
Asynchronous
CMOS
UNCOREPWRGOOD
The processor requires this input signal to be a clean indication
that the VCCSA, VCCIO, VAXG, and VDDQ, power supplies are
stable and within specifications. This requirement applies
regardless of the S-state of the processor. 'Clean' implies that
the signal will remain low (capable of sinking leakage current),
without glitches, from the time that the power supplies are
turned on until they come within specification. The signal must
then transition monotonically to a high state. This is connected
to the PCH PROCPWRGD signal.
I
Asynchronous
CMOS
SKTOCC#
SKTOCC# (Socket Occupied) : This signal is pulled down
directly (0 Ohms) on the processor package to the ground.
There is no connection to the processor silicon for this signal.
System board designers may use this signal to determine if the
processor is present.
PROC_SEL
Processor Select: This signal is an output that indicates if the
processor used is 2nd Generation Intel® Core™ processor family
desktop, Intel® Pentium® processor family desktop, Intel®
Celeron® processor family desktop or Desktop 3rd Generation
Intel® Core™ processor family, Desktop Intel® Pentium®
processor family, Desktop Intel® Celeron® processor family .
For 2nd Generation Intel® Core™ processor family desktop,
Intel® Pentium® processor family desktop, Intel® Celeron®
processor family desktop, the output will be high.
For Desktop 3rd Generation Intel® Core™ processor family,
Desktop Intel® Pentium® processor family, Desktop Intel®
Celeron® processor family, the output will be low.
O
VCCIO_SEL
Voltage selection for VCCIO: This output signal was initially
intended to select the I/O voltage depending on the processor
being used.
Since the VCCIO voltage is the same for 2nd Generation Intel®
Core™ processor family desktop, Intel® Pentium® processor
family desktop, Intel® Celeron® processor family desktop and
Desktop 3rd Generation Intel® Core™ processor family, Desktop
Intel® Pentium® processor family, Desktop Intel® Celeron®
processor family, the usage of this pin was changed as follows:
The pin is configured on the package to be same as 2nd
Generation Intel® Core™ processor family desktop, Intel®
Pentium® processor family desktop, Intel® Celeron® processor
family desktop . This pin must be pulled high on the
motherboard, when using a dual rail voltage regulator.
O