Intel SG-81 DRAM Clock/Timing Control, BIOS Setup, 3-11, DRAM Timing Control, DRAM CAS Latency

BIOS Setup 3-11

DRAM Clock/Timing Control:

Scroll to this item and press <Enter> to view the following screen:

DRAM Timing Control

Enables you to select the CAS latency time in HCLKs of 2, 2.5, or 3. The value is set at the factory depending on the DRAM installed. Do not change the values in this field unless you change specifications of the installed DRAM or the installed CPU.

DRAM CAS Latency:

This item controls the timing delay (in clock cycles) before the DRAM starts a read command after receiving it.

RAS Active Time (tRAS):

This item allows you to set the amount of time a RAS can be kept open for multiple accesses. High figures will improve performance.

RAS Precharge Time (tRP):

This is the duration of the time interval during which the Row Address Strobe signal to a DRAM is held low during normal Read and Write Cycles. This is the minimum interval between completing one read or write and starting another from the same (non-page mode) DRAM. Techniques such as memory interleaving, or use of Page Mode DRAM are often used to avoid this delay. Some chipsets require this parameter in order to set up the memory configuration properly. The RAS Precharge value is typically about the same as the RAM Access (data read/write) time.

User’s Manual