CV-A33CL
5. Pin Assignment
5.1. 12-pin Multi-connector (DC-IN/Trigger)
Type:
(Seen from rear of camera.)
19
2 10 8
3 11 12 7
46
5
Fig. 2. 12-pin connector.
Pin no. | Signal |
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1 | GND |
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2 | +12 V DC input |
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3 | GND |
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4 | N/C |
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5 | GND |
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6 | RXD in |
| RS 232C. Or via Camera Link by internal |
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7 | TXD out |
| SW200 on PK8378A (Off=HR) |
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8 | GND |
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9 | EEN out |
| And via Camera Link |
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10 | Trigger input |
| Or via Camera Link. (TI=1 for HR) *) |
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11 | N/C |
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12 | GND |
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*) Internal
5.2. Digital Output Connector for Camera Link
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26 |
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| 14 |
Type: 26 pin MRD connector 3M
Fig. 3. Camera Link connector
The digital output signals follow the Camera Link standardized multiplexed signal output interface. Camera Link base configuration is used. The interface circuit is build around the NS type DS90CR285MTD.
The following signals are found on the Digital Output Connector:
SerTC | RXD serial data to camera | (Or via 12 pin HR by internal SW200. |
SerTFG | TXD serial data to frame grabber | On for CL) |
CC1 | Trigger input | (Or on 12 pin HR. TI=0 for CL) |
CC2 | Factory use |
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X0 to X3 | Camera Link multiplexed data out |
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Xclk | Camera Link clock. Used as pixel clock. |
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In the Channel Link X0 to X3 multiplexed signals the following signals are encoded. | ||
D0 – D9 | 2 x 8/10 bit video data out. |
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LVAL | Line VALid. Video line data is valid. High for valid line. | |
FVAL | Frame VALid. Video frame data is valid. High for valid frame. | |
DVAL | Data VALid. Effective video pixel data is valid. High for valid data. | |
EEN | Exposure ENable. High during exposure. |
The polarity is positive and TRIG in negative as factory setting.
For Camera Link interface principle diagram please check Fig. 7.
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