pc | 10.25 pc | 11.25 pc | 38 |
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| 34.5 pc |
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| Bus Mastering | A |
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| transfer of data directly to and from system memory without interrupting |
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| the computer’s microprocessor. This is the fastest way for multitasking |
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| operating systems to transfer data. |
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| Byte |
| A unit of information consisting of eight bits. |
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| CISPR |
| A special international committee on radio interference (Committee, |
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| International and Special, for Protection in Radio). |
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| Configuration | Refers to the way a computer is set up; the combined hardware |
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| components (computer, monitor, keyboard, and peripheral devices) that |
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| make up a computer system; or the software settings that allow the |
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| hardware components to communicate with each other. |
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| CRC |
| Cyclic Redundancy Check is an error detection code used in Ultra160 |
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| SCSI. Four bytes are transferred with the data to increase the reliability |
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| of data transfers. CRC is used on the Double Transition (DT) |
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| DT |
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| CPU |
| Central Processing Unit. The “brain” of the computer that performs the |
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pc |
| actual computations. The term Microprocessor Unit (MPU) is also used. |
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| DMA |
| Direct Memory Access. |
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| DMA Bus |
| A feature that allows a peripheral to control the flow of data to and from |
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| Master |
| system memory by blocks, as opposed to PIO (Programmed I/O) where |
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| the processor is in control and the flow is by byte. |
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| Device Driver | A program that allows a microprocessor (through the operating system) |
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| to direct the operation of a peripheral device. |
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| Differential | A hardware configuration for connecting SCSI devices. It uses a pair of |
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SCSI |
| lines for each signal transfer (as opposed to |
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| references each SCSI signal to a common ground). |
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| Domain |
| Domain Validation is a software procedure in which a host queries a |
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| Validation |
| device to determine its ability to communicate at the negotiated Ultra160 |
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| data rate. |
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| DT Clocking | In Double Transition (DT) Clocking data is sampled on both the asserting |
| |
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| and deasserting edge of the REQ/ACK signal. DT clocking may only be |
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| implemented on an LVD SCSI bus. |
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Glossary of Terms and Abbreviations |