Reset and Interrupt Handling | Maxtor 93073H4, 96147H8, 91536H2

HOST SOFTWARE INTERFACE

Reset and Interrupt Handling

Reset Handling

One of three different conditions may cause a reset: power on, hardware reset or software reset. All three cause the interface processor to initialize itself and the Task File registers of the interface. A reset also causes a set of the Busy bit in the Status register. The Busy bit does not clear until the reset clears and the drive completes initialization. Completion of a reset operation does not generate a host interrupt.

Task File registers are initialized as follows:

Error	1
Sector Count	1
Sector Number	1
Cylinder Low	0
Cylinder High	0
Drive/Head	0

Interrupt Handling

The drive requests data transfers to and from the host by asserting its IRQ 14 signal. This signal interrupts the host if enabled by bit 1 (IRQ enable) of the Fixed Disk Control register.

Clear this interrupt by reading the Status register, writing the Command register, or by executing a host hardware or software reset.

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Maxtor 93073H4, 96147H8, 91536H2, 94610H6, 92305H3 specifications Reset and Interrupt Handling

Contents

DiamondMax Before You Begin U T I O N Contents Product Specifications AT Interface Description Service and Support Figures Introduction Maxtor CorporationManual Organization Abbreviations Conventions DiamondMax 60 Key Features Product Description Product Features Functional / InterfaceModel CYL MAX LBA Capacity Cache Management Major HDA Components Jumper Location / Configuration Subsystem ConfigurationCylinder Limitation Jumper Description Product Specifications Drive ConfigurationPerformance Specifications Models and Capacities Physical Dimensions maximum Parameter A N D a R D Metric Power Requirements Power Mode DefinitionsEPA Energy Star Compliance Environmental Limits Shock and Vibration Reliability SpecificationsParameter E R a T I N G Safety Regulatory Compliance EMC/EMI Hard Drive Handling Precautions Handling and InstallationElectro-Static Discharge ESD Unpacking and Inspection Multi-pack Shipping Container Physical Installation Repacking Before You Begin Hook up Set up Start up Interface Connector PIN SignalAT Interface Description Pin Description Summary PIN Name Signal Name Signal Description Pin Description Table Timing Parameters Mode PIO Timing DMA Timing Ultra DMA Timing Timing Parameters all times in nanoseconds Sustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Task File Registers Host Software InterfacePort Read Write N T E N T S LBA Bits Command Register Summary R a M E T E R S U S E D Control Diagnostic Registers Reset and Interrupt Handling Interface Commands Read Commands Read DMA Write Commands Write Multiple Value Description Mode Set/Check CommandsEV E L Value M M a N D Power Mode Commands Timer Value TIME-OUT Period Sleep Mode Initialization Commands Content Description 15 -3 = reserved R D Content Description Initialize Drive Parameters Seek, Format and Diagnostic Commands Error Code Description A.R.T. Command Set Key Register Service and Support Service PolicyNo Quibble Service Support From Dial Glossary Block Correctableerror Fetch Landingzoneorlzone Physicalsector Softerror