AWARD® BIOS Setup
DRAMFrequency(MHz)
Use this item to configure the clock frequency of the installed SDRAM. Settings options are:
HCLK | The DRAM clock will be equal to the host clock. |
| The DRAM clock will be equal to the host clock minus 33 |
| MHz. For example, if the host clock is 133 MHz, the |
| DRAM clock will be 100 MHz. |
HCLK+33 | The DRAM clock will be equal to the host clock plus |
| 33MHz. For example, if the host clock is 100 MHz, the |
| DRAM clock will be 133 MHz. |
Auto | DRAM clock frequency is determined by the contents of |
| SPD EEPROM on the DRAM module. |
DRAM CAS Latency
This controls the timing delay (in clock cybles) before SDRAM starts a read command after receiving it. Settings: Auto, 2, 2.5, 3 (T=clock cycle). 2 (clocks) increases the system performance to the most extreme extent while 3 (clocks) provides the most stable performance.
Bank Interleave
Set the option to Auto for the system to select the appropriate bank interleave for the installed SDRAM. Disable the function if 16MB SDRAM is installed. Settings: Disabled, Auto.
Row Precharge
This item controls the number of cycles of Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refresh may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. Available settings: 2T, 3T, Auto.
RAS Pulse
This setting allows you to select the number of clock cycles allotted for the RAS pulse width, according the DRAM specifications. The less the clock cycles, the faster the DRAM performance. Settings: 6T, 5T, Auto.
