Glossary
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National Instruments Corporation G-3 VXI/VMEpc 600 Series for Windows 95/NT
C
CLK10 A 10 MHz, ±100 ppm, individually buffered (to each module slot),
differential ECL system clock that is sourced from Slot 0 of a VXIbus
mainframe and distributed to Slots 1 through 12 on P2. It is distributed to
each slot as a single-source, single-destination signal with a matched delay
of under 8 ns.
CMOS Complementary Metal Oxide Semiconductor; a process used in making
chips
Commander A message-based device that is also a bus master and can control one or
more Servants
configuration registers A set of registers through which the system can identify a module device
type, model, manufacturer, address space, and memory requirements. In
order to support automatic system and memory configuration, the VXI bus
specification requires that all VXIbus devices have a set of such registers.
D
Data Transfer Bus DTB; one of four buses on the VMEbus backplane. The DTB is used by a
bus master to transfer binary data between itself and a slave device.
DMA Direct Memory Access; a method by which data is transferred between
devices and internal memory without intervention of the central processing
unit
DRAM Dynamic RAM (Random Access Memory); storage that the computer must
refresh at frequent intervals
driver window A region of address space that is decoded by the VXI/VMEpc for use by the
NI-VXI software
DTB See Data Transfer Bus.
E
ECL Emitter-Coupled Logic
EEPROM Electronically Erasable Programmable Read Only Memory