Chapter 4 Theory of Operation
DAQCard-1200 User Manual 4-8 © National Instruments Corporation
with a range of –2,048 to +2,047. In this mode, the MSB of the ADC result
is modified to make it two’s complement. The output from the ADC is then
sign extended to 16 bits, causing either a leading 0 or a leading F (hex) to
be added, depending on the coding and the sign. Thus, data values read
from the FIFO are 16 bits wide.
Data Acquisition Timing
A data acquisition operation refers to the process of taking a sequence of
A/D conversions when the sample interval (the time between successive
A/D conversions) is carefully timed. A data acquisition operation can either
acquire a finite number of samples (controlled run) or an infinite number
ofsamples (freerun). The DAQCard-1200 unit can perform both
single-channel data acquisition and multiple-channel (scanned) data
acquisition in two modes—continuous and interval.
The data acquisition timing circuitry consists of various clocks and timing
signals that control the data acquisition operation. Data acquisition timing
consists of signals that initiate a data acquisition operation, time the
individual A/D conversions, gate the data acquisition operation, and
generate scanning clocks. The data acquisition operation can either be
timed by the timing circuitry or by externally generated signals. These
twomodes are software configurable.
Data Acquisition Operation
Data acquisition operations are initiated either externally through
EXTTRIG or through software control. The data acquisition operation is
terminated either internally by counter A1 of the 82C53(A) counter/timer
circuitry, which counts the total number of samples taken during a
controlled operation, or through software control in a freerun operation.
Continuous Data Acquisition
In a continuous data acquisition operation, samples are taken at regular
sample intervals without any delays. Therefore, each sample is taken
with the same sample interval. This applies to both single-channel and
multiple-channel data acquisition in either freerun or controlled operation.
The sample interval is either controlled externally by EXTCONV* or
internally by counter A0 of the timing circuitry.