National Instruments NI 5412 CLK IN

CLK IN

Table 5.

Specification Valu e Comments

Connector SMB (jack) —

Direction Input —

Destinations 1. Sample Clock

2. PLL Reference Clock

—

Frequency

Range

1 MHz to 105 MHz (Sample Clock destination and

sine waves)

200 kHz to 105 MHz (Sample Clock destination and

square waves)

5 MHz to 20 MHz (PLL Reference Clock destination)

—

Input Voltage

Range

Sine wave: 0.65 Vpk-pk to 2.8 Vpk-pk into 50 Ω

(0 dBm to +13 dBm)

Square wave: 0.2 Vpk-pk to 2.8 Vpk-pk into 50 Ω

—

Maximum

Input Overload

±10 V —

Input

Impedance

50 Ω—

Input Coupling AC —

Contents

Main NI 5412 Specifications NI PXI/PCI-5412 14-Bit 100 MS/s Arbitrary Waveform Generator Contents CH 0 (Channel 0 Analog Output, Front Panel Connector) Page Page Figure 1. Pulse Response, Low-Gain Amplifier Path 50 Load Page Sample Clock Page Page Onboard Clock (Internal VCXO) Phase-Locked Loop (PLL) Reference Clock CLK IN (Sample Clock and Reference Clock Input, Front Panel Connector) PFI 0 and PFI 1 (Programmable Function Interface, Front Panel Connectors) Start Trigger Page Markers Waveform and Instruction Memory Utilization Page Calibration Power Software Environment NI PXI-5412 Environment NI PCI-5412 Environment Safety, Electromagnetic Compatibility, and CE Compliance Page Physical Where to Go for Support