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National Instruments
NI 5412
Figure 1. Pulse Response, Low-Gain Amplifier Path 50 Load
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5
NI 5412 Specifications
Figure 1.
Pulse Response, Low-Gai
n Amplifier Path 50
Ω
Load
–2.0
–1.6
–0.4
–1.2
0.0
–0.8
0.4
0.8
1.2
1.6
2.0
0
0.2 0.4 0.6 0.8 1.0
Time (
µ
s
)
Amplitude (V)
Contents
Main
NI 5412 Specifications
NI PXI/PCI-5412 14-Bit 100 MS/s Arbitrary Waveform Generator
Contents
CH 0
(Channel 0 Analog Output, Front Panel Connector)
Page
Page
Figure 1. Pulse Response, Low-Gain Amplifier Path 50 Load
Page
Sample Clock
Page
Page
Onboard Clock
(Internal VCXO)
Phase-Locked Loop (PLL) Reference Clock
CLK IN
(Sample Clock and Reference Clock Input, Front Panel Connector)
PFI 0 and PFI 1
(Programmable Function Interface, Front Panel Connectors)
Start Trigger
Page
Markers
Waveform and Instruction Memory Utilization
Page
Calibration
Power
Software
Environment
NI PXI-5412 Environment
NI PCI-5412 Environment
Safety, Electromagnetic Compatibility, and CE Compliance
Page
Physical
Where to Go for Support