National Instruments NI 5412 PFI 0 and PFI 1

NI 5412 Specifications 12 ni.com

PFI 0 and PFI 1

Table 6.

Specification Valu e Comments

Connectors Two SMB (jack) —

Direction Bi-directional —

Frequency

Range

DC to 105 MHz —

As an Input (Trigger)

Destinations Start Trigger —

Maximum

Input Overload

–2 V to +7 V —

VIH 2.0 V

VIL 0.8 V

Input

Impedance

1 kΩ

As an Output (Event)

Sources 1. Sample Clock divided by integer K (1 ≤ K ≤ 4,194,304)

2. Sample Clock Timebase (100 MHz) divided by

integer M (2 ≤ M ≤ 4,194,304)

3. PLL Reference Clock

4. Marker

5. Exported Start Trigger (Out Start Trigger)

—

Output

Impedance

50 Ω—

Maximum

Output

Overload

–2 V to +7 V —

Contents

Main NI 5412 Specifications NI PXI/PCI-5412 14-Bit 100 MS/s Arbitrary Waveform Generator Contents CH 0 (Channel 0 Analog Output, Front Panel Connector) Page Page Figure 1. Pulse Response, Low-Gain Amplifier Path 50 Load Page Sample Clock Page Page Onboard Clock (Internal VCXO) Phase-Locked Loop (PLL) Reference Clock CLK IN (Sample Clock and Reference Clock Input, Front Panel Connector) PFI 0 and PFI 1 (Programmable Function Interface, Front Panel Connectors) Start Trigger Page Markers Waveform and Instruction Memory Utilization Page Calibration Power Software Environment NI PXI-5412 Environment NI PCI-5412 Environment Safety, Electromagnetic Compatibility, and CE Compliance Page Physical Where to Go for Support