TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 14 of 66
NXP Semiconductors TFA9812
BTL stereo Class-D audio amplifier with I2S input
In I2C control mode communication is enabled after 4 ms. The preferred I2C settings can
be made within 66 ms before the PLL starts running. Finally, the output stages are
enabled and the audio level is increased via a demute sequence if mute has previously
been disabled.
Remark: In I2C mode soft mute is enabled by default. It can be disabled at any time while
I2C communication is valid. In order to prevent audio clicks volume control (default setting
is 0 dB) should be set before soft mute is disabled.
Remark: For a proper start-up in I2S master mode and I2C mode the following sequence
should be followed:
1. The I2S master setting should be set and keep the default sample rate setting active.
2. Next, another sample rate setting than the default one should be selected.
3. Finally, when the default sample rate is used the default sample rate setting should be
selected again.

8.3.2 Power-down

Figure 3 includes the power-down timing while Table 11 shows the pin control for enabling
power-down.
Putting the TFA9812 into power-down is equivalent to enabling Sleep mode
(see Section 8.2.2). This mode is entered immediately and no additional clock cycles are
required.
In order to prevent audible clicks, soft mute should be enabled at least Td(soft_mute)
seconds before enabling Sleep mode.
The specified low current and power conditions in Table 1 are valid within 10 µs after
enabling Sleep mode.

8.4 Digital audio data input

8.4.1 Digital audio data format support

The TFA9812 supports a commonly used range of I2S and I2S-like digital audio data input
formats. These are listed in Table 12.
Table 11. Power-up/power-down selection
Power-up pin
value Description
0 Power-down (Sleep mode)
1 Power-up
Table 12. Supported digital audio data formats
BCK frequency Interface format (MSB first) Supported in I2C
control mode Supported in Legacy
control mode
32 fsI2S up to 16-bit data yes yes
32 fsMSB-justified 16-bit data yes yes
32 fsLSB-justified 16-bit data yes yes
48 fsI2S up to 24-bit data yes yes
48 fsMSB-justified up to 24-bit data yes yes