NXP Semiconductors TFA9812 13. Characteristics

TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 44 of 66
NXP Semiconductors TFA9812
BTL stereo Class-D audio amplifier with I2S input
13. Characteristics
13.1 DC Characteristics
Table 55. DC characteristics
Unless specified otherwise, V
DDA
=V
DDP
= 12 V, V
SSP1
= V
SSP2
= 0 V, V
DDA(3V3)
=V
DDD(3V3)
= 3.3 V,
V
SS1
=V
SS2
= REFD = REFA = 0 V, T
amb
=25 ° C, R
L
=8 Ω , f
i
= 1 kHz, f
s
= 44.1 kHz, f
sw
= 400 kHz, 24-bit I
2
S input data,
MCLK clock mode, typical application diagram (Figure 13).
Symbol Parameter Condition Min Typ Max Unit
Supply voltage
VDDA analog supply
voltage 81220V
VDDP power supply voltage 8 12 20 V
VDDA(3V3) analog supply
voltage (3.3 V) 3.0 3.3 3.6 V
VDDD(3V3) digital supply voltage
(3.3 V) 3.0 3.3 3.6 V
IPsupply current soft mute mode, with
load, filter and snubbers
connected
[1] -3845mA
sleep mode [1] - 160 270 µA
IDDA(3V3) analog supply
current (3.3 V) operating mode
I2S slave mode - 2 4 mA
I2S master mode - 4 6 mA
sleep mode
VDDA =V
DDP =12V - 120 - µA
VDDA =V
DDP =1V - 40 70 µA
IDDD(3V3) digital supply current
(3.3 V) operating mode
I2S slave mode - 15 25 mA
I2S master mode - 25 40 mA
sleep mode;
DATA=WS=BCK=
MLCK = 0 V
-430µA
Amplifier output pins; pins OUT1P, OUT1N, OUT2P and OUT2N
|VO(offset)|output offset voltage soft mute mode - - 5 mV
Power-up pin
VIH HIGH-level input
voltage With respect to VSS1 2.1 - VDDD(3V3) V
VIL LOW-level input
voltage With respect to VSS1 −0.3 - +0.8 V
IIinput current - 0.1 20 µA
MCLK, BCK, WS, DATA pin
VIH HIGH-level input
voltage With respect to VSS2 0.7 × VDDD(3V3) -- V
VIL LOW-level input
voltage With respect to VSS2 - - 0.3 × VDDD(3V3) V
Ciinput capacitance - - 3 pF