NXP Semiconductors TFA9812 14. Application information

TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 49 of 66
NXP Semiconductors TFA9812
BTL stereo Class-D audio amplifier with I2S input
[1] Cb is the total capacitance of one bus line in pF. The maximum capacitive load for each bus line is 400 pF.
[2] After this period, the first clock pulse is generated.
[3] To be suppressed by the input filter.
14. Application information
14.1 Output power estimation
The output power just before clipping can be estimated using Equation 10:
(10)
Where:
VP = supply voltage (V) (VDDP-VSSP).
RL = load impedance (Ω).
RDSon = ‘On’ resistance power switch (Ω).
RS = Series resistance output inductor (Ω).
tSU;STO set-up time for STOP condition 0.6 - - µs
tBUF bus free time between a STOP and
START condition 1.3 - - µs
tSU;DAT data set-up time 100 - - ns
tHD;DAT data hold time 0 - - µs
tSP pulse width of spikes that must be
suppressed by the input filter
[3] 0 - 50 ns
Cbcapacitive load for each bus line - - 400 pF
Table 57. Characteristics I2C bus interface; see Figure 10
…continued
V
DDD(3V3)
=V
DDA(3V3)
= 2.7 V to 3.6 V; V
DDA
=V
DDP
= 8 V to 20 V;T
amb
= − 20 ° C to +85 ° C; all voltages referenced to ground;
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Fig 10. Timing
tBUF tLOW trtf
tHD;STA tSU;STA
tHD;DAT tHIGH tSU;DAT
tHD;STA
tSU;STO
tSP
P S Sr P
SDA
SCL
010aaa225
PO(0.5%)
RL
RL2R
DSon RS
+()⋅+
----------------------------------------------------


δmax VP ⋅⋅


2
2R
L
⋅
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