Philips Semiconductors

ISP1301 USB OTG Transceiver Eval Kit User’s Guide

TABLES

 

 

Table 3-1: +5.0 V power selection

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Table 3-2: VBAT and VIO selection

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Table 3-3: I2C master selection

6

Table 7-1: DB-25 PC parallel port connector (J10) pin assignment

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Table 7-2: 8-bit microprocessor-interface 20 x 2 header (J13) pin assignment[1]

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Table 7-3: OTG Controller interface J8 pin assignment

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Table 7-4: OTG Controller interface J3 pin assignment

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Table 9-1: BOM of the ISP1301 evaluation board

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FIGURES

 

 

Figure 1-1: ISP1301 evaluation board PCB layout

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Figure 4-1: Location of major components

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Figure 5-1: Test program main menu

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Figure 5-2: List all registers screen display

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Figure 5-3: Read/Write register screen display

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Figure 5-4: Select Mode of Operation screen display

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Figure 6-1: Block diagram of the ISP1301 evaluation board

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© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

User’s Guide

Rev. 1.0—February 2003

4 of 18

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Philips ISP1301 manual Figures