1999 Oct 12 19
Philips Semiconductors Product specification
IC card interface TDA8002C
VOL(OFF) LOW-leveloutput voltage on
pin OFF IOL(OFF) =2mA −−0.4 V
IOL(ALARM) LOW-leveloutput current on
pin ALARM VOL(ALARM)=0V −−−5µA
V
OH(ALARM) HIGH-level output voltage
on pin ALARM IOH(ALARM)=2mA V
DD 1−− V
t
WALARM pulse width 6 20 ms
Clock output (CLKOUT; powered from VDD)
fCLKOUT frequency on CLKOUT 0 20 MHz
low power 16 kHz
VOL LOW-level output voltage IOL = 1 mA 0 0.5 V
VOH HIGH-level output voltage IOH =1mA V
DD 0.5 −− V
t
r
, tfrise and fall times CL=15 pF; notes 3 and 4 −−8ns
δduty factor CL= 15 pF; notes 3 and 4 40 60 %
Internal oscillator
fint frequency of internal
oscillator active mode 2 2.5 3 MHz
sleep mode 32 kHz
Card reset output (RST)
VO(inact) output voltage inactive modes 0 0.3 V
td(RST) delay between RSTIN and
RST RST enabled −−100 ns
VOL LOW-level output voltage IOL = 200 µA00.3 V
VOH HIGH-level output voltage IOH =200 µAV
CC 0.5 VCC V
tr, tfrise and fall times CL=30pF −−0.5 ns
Card clock output (CLK)
VO(inact) output voltage inactive modes 0 0.3 V
VOL LOW-level output voltage IOL = 200 µA00.3 V
VOH HIGH-level output voltage IOH =50 µAV
CC 0.5 VCC V
tr, tfrise and fall times CL=30 pF; note 3 −−8ns
δduty factor CL= 30 pF; note 3 45 55 %
SR slew rate (rise and fall) 0.2 −− V/ns
Strobe input (STROBE)
fSTROBE frequency on STROBE 0 10 MHz
VIL LOW-level input voltage 0 0.3VDD V
VIH HIGH-level input voltage 0.7VDD VDD V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 5
VIL LOW-level input voltage 0 0.3VDD V
VIH HIGH-level input voltage 0.7VDD VDD V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT