2002 Oct 23 11
Philips Semiconductors Product specification
40 Msps, 10-bit analog-to-digital
interface for CCD cameras TDA8783
Notes
1. Moreinformation about CDS related signals is available in the following figures: The clamp current for pin CPCDS is
given in Fig. 9, clamp current for pins IND and INP in Fig 10 and for clamp current for pin Vref in Fig 11. The CDS
output amplitude is shown in Fig. 14
2. Noisemeasurement at ADC outputs: the coupling capacitor at the input is connected to ground, so that only the noise
contributionof the front-end is evaluated. The front-end operates at 18 Mpix with a line of 1 024 pixels. The first 40 are
used to run CLPOB and the last 40 to run CLPDM. Data at the ADC outputs is measured during the other pixels.
The differences between the types of codes statistic is then computed; the result is the noise. No quantization noise
is taken into account as no signal is input. Figure15 gives noise figure graphs with signal input.
3. Depending on operating pixel frequency, the output voltage and capacitance must be determined according to the
output delay timings (to(d)), see Fig.5.
ZOFDOUT additional 8-bit control DAC
(OFD) output impedance
2000 −Ω
I
OFDOUT OFD output current drive static −−50 µA
ADC clamp control DAC(see Fig.8)
VDACOUT(p-p) ADC clamp 10-bit control DAC
output voltage (peak-to-peak
value)
1V
VDACOUT DC output voltage code 0 1.5 V
code 1023 2.5 V
ZDACOUT ADC clamp control DAC output
impedance
−−250
IDACOUT DAC output current drive static −−50 µA
OFELOOP maximum offset error of
DAC+ ADC clamp loop code 0 −±5LSB
code 1023 −±5LSB
Digital outputs (fCLK = 40 MHz; CL= 20 pF); note 3
VOH HIGH-level output voltage IOH =1mA V
CCO 0.5 VCCO V
VOL LOW-level output voltage IOL =1mA 0 0.5 V
IOZ output current in 3-state mode 0V<V
o<V
CCO 20 +20 µA
to(h) output hold time 8 −−ns
to(d) output delay time CL=20 pF; VCCO =5V 17 23 ns
CL= 10 pF; VCCO =5V 15 21 ns
CL= 20 pF; VCCO =3V 20 29 ns
CL= 10 pF; VCCO =3V 17 25 ns
CL= 20 pF; VCCO = 2.5 V 22 33 ns
CL= 10 pF; VCCO = 2.5 V 18 28 ns
Serial interface
fSCLK(max) maximum frequency of serial
interface 5−−MHz
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT