1234

 

No.

Pin Name

I/O

Function

A

101

BCKO

O

Bit clock output

 

102

DACLKO

O

Clock output for audio DA converter, 256fs (VCOR/2)

 

 

 

 

 

 

103

DTOK

O

Receive data condition (Good/poor = H/L)

 

 

 

 

 

 

104

C12

O

12.288MHz clock output (OSCI/2)

 

 

 

 

 

 

105

VSS

Digital GND

 

106

TEST56

I/O

Test pin, normally open-circuit

 

 

 

 

 

 

107

TEST57

I/O

Test pin, normally open-circuit

 

108

TEST58

O

Test pin, normally open-circuit

 

 

 

 

 

 

109

TEST59

I/O

Test pin, normally open-circuit

 

 

 

 

 

 

110

PDDN

O

Phase comparison output down

 

 

 

 

 

B

111

PDUP

O

Phase comparison output up

 

 

 

 

 

112

PLVAR

O

PLL comparator output (VCOT/640 or VCOR/512)

 

 

 

 

 

 

113

PLREF

O

PLL reference output (fs)

 

 

 

 

 

 

114

TEST60

I

Test pin, normally fixed to L

 

 

 

 

 

 

115

TEST61

I

Test pin, normally fixed to L

 

 

 

 

 

 

116

VSS

Digital GND

 

117

VCOR

I

Reception VCO input

 

 

 

 

 

 

118

TEST62

I

Test pin, normally fixed to H

 

 

 

 

 

 

119

TEST63

I

Test pin, normally fixed to H

 

 

 

 

 

 

120

VCOT

I

Transmission VCO input

 

 

 

 

 

C

121

VDD

Digital power supply

122

TEST64

I

Test pin, normally fixed to L

 

 

123

TEST65

I

Test pin, normally fixed to L

 

124

TEST66

I

Test pin, normally fixed to L

 

125

TEST67

I

Test pin, normally fixed to L

 

 

 

 

 

 

126

TEST68

I

Test pin, normally fixed to H

 

 

 

 

 

 

127

VSS

Digital GND

 

 

 

 

 

 

128

CSOD

O

Chapter start delay output

 

 

 

 

 

 

129

CSO

O

Chapter start output

 

 

 

 

 

 

130

SCMODE

I

Serial control mode selection (Pin/Serial = L/H)

 

 

 

 

 

D

131

TRMODE

I

Transmission/Reception mode selection (Transmission/Reception = L/H)

132

TEST69

I

Test pin, normally fixed to L

 

 

133

DIVCODE

I

Full/Half band mode selection (Full/Half = L/H)

 

134

CHNUM

I

Channel number selection (0 ch/1 ch = L/H)

 

 

 

 

 

 

135

TEST70

I

Test pin, normally fixed to L

 

136

ERRO

O

Error output (No error/Error = L/H)

 

137

TEST71

O

Test pin, normally open-circuit

 

138

VSS

Digital GND

 

139

XRST

I

Hardware reset (Reset=L)

 

140

XRSTS

I

Software reset (Reset=L)

 

141

IIFSEL0

I

Input selection 0

E

142

TEST72

I

Test pin, normally fixed to L

 

143

MLSEL

I

MSB/LSB selection of digital-audio AD/DA converter data

 

144

VDD

Digital power supply

 

145

PSSEL

I

Front/back squeeze selection of digital-audio AD/DA converter data

 

146

XMUTE

I

Mute input (Mute/Through = L/H)

 

147

CRCCK

I

CRC check request (Off/On = L/H)

 

148

TEST73

I

Test pin, normally fixed to L

 

149

VSS

Digital GND

 

150

SRDT

O

Read-out output of CPU interface data

F

46

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SE-DIR800C

3

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Image 46
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