Chapter 4 Award BIOS Setup
PSB-1688LF USER
S MANUAL Page: 4-13
DRAM CLOCK/DRIVE CONTROL:
The options for these items are found in its sub menu. By pressing the
<ENTER> key, you are prompt to enter the sub menu of the detailed options
as shown below:
Phoenix – Award WorkstationCMOS Setup Utility
DRAM clock / Drive Control
Item Help
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
DRAM Timing
X DRAM Cas Latency
X Bank Interleave
X Precharge to Active (Trp)
X Active to Precharge (Tras)
X Active to CMD (Trcd)
DRAM Command Rate
100 MHz
133MHz
[By SPD]
[By SPD]
2.5
Disabled
3T
6T
3T
[2T Command]
Menu Level
↑↓→←:Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
Descriptions on each item above are as follows:
1. Current FSB Frequency
This item shows the CPU front-side Bus Frequency
2. Current DRAM Frequency
This item shows the DRAM frequency
3. DRAM Clock
This item allows you to control the DRAM speed at either equal to or
one-half of the SYSCLK (system clock signal) speed. While speed is
always desirable, choosing the higher setting may prove to be too fast
for some components.
4. DRAM Timing
The value in this field depends on performance parameters of the
installed memory chips (DRAM). Do not change the value from the
factory setting unless you install new memory that has a different
performance rating than the original DRAMs.