Seiko Instruments G1216B1N000 user manual Lower bits

AN.No.G1216B1N000-3D0E

(3) X-address (page) set

Code	R/W	D/I	DB7							DB0
	0	0	1	0	1	1	1	A	A	A

Upper bits

Lower bits

The display data RAM “X” address (page) which is expressed with binary AAA is set in the X-address register. Following write/read operations from the MPU are performed on the specified X-address (page) until the next X-address (page) set is performed. The configuration of display data RAM and X-address is shown in Figure 9.

Code

R/W	D/I	DB7							DB0
0	0	0	1	A	A	A	A	A	A

Upper bits Lower bits

(4) Y-address set

The display data RAM Y- address which is expressed with binary AAAAAA is set in the Y-address counter. After that the Y-address counter advances by one each time write/read is performed from the MPU. The configuration of the display data RAM and Y-address is shown in Figure 9.

	Y-address
0 1 2 3 4 - - - -	- - - - - - - - - - - 61 62 63
DB0
to	Page 0
DB7
DB0
to	Page 1
DB7

DB0
to	Page 6
DB7
DB0
to	Page 7
DB7

X=0

X=1

X=6

X=7

Figure 9 Display Data RAM Address Configuration

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