In order to read the content of the output register, the Chip Select must be selected, D/I must be 1, and R/W must be 1. When executing the “Read” instruction, the contents of the output register stored at that time are output during the time that “E” is 1. When “E” falls, display data of the currently indicated address is written in the output register. After that, the address advances by one.
The contents of the output register are rewritten by the Read instruction. The data is retained by the address set or other instructions. Accordingly, when performing the address set, and next executing the Read instruction, the data of the specified address is not output and the data of the address which is specified is output at the second data read time. Therefore, when setting the address, a dummy read is needed once. See Figure 4.
D / I
R/W
E
Address Output Register
DB0 to DB7
(2)Busy flag
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N)
Figure 4 Read Timing
The status when busy flag is “1” means that the module is operating internally. Instructions other than he Status Read are not available at this time. The busy flag is output to DB7 by the Status Read instruction. Ensure that the busy flag is “0” before executing the instruction.
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Fis frequency of 1 or 2 (1 / 2 the source oscillation frequency of HD61203): 215 kHz typ.
Figure 5 Busy Flag
(3)Display ON/OFF Flip/Flop
The display ON/OFF Flip/Flop is a flip-flop function that determines whether the display data corresponding to the RAM data is output to the segment on the LCD (ON status ) or goes to all nonlit status regardless of the RAM data (OFF status). This is controlled by the display ON/OFF instruction. When the RST signal becomes “0,” the display goes to OFF status. This flip-flop status is output to DB 5 by the Status Read instruction.
Even when performing display ON/OFF, the data inside the RAM is not affected.
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