Seiko Instruments AN.No.G1216B1N000-3D0E 4 Display start line register, Z-address counter

AN.No.G1216B1N000-3D0E

(4)Display start line register

The display start line register is a register which determines the line address (see Figure 6) for which data is displayed on the top line of the LCD screen when displaying the contents of the display data RAM on the LCD screen. It is also used to scroll the display. The 6 bit (0 to 63) display start line information is written in this register by the Display Start Line Set Instruction.

The contents of this register are transmitted to address counter Z at “H” level of the FRM signal (common driver output) which indicates the display start on the screen.

(5)Z-address counter

The Z-address counter generates the address to output the display data synchronized with the common signal. This is a 6-bit counter which counts at the fall of the CL signal (common driver output). The contents of the display start line register are preset to the Z-address counter at “H” level of the FRM signal (common driver output).

(6)Display data RAM

The display data RAM is a RAM that stores the display dot data. 1 bit of RAM data corresponds to lighting (data=1) or non-lighting (data = 0) of 1 dot of the display on the LCD screen. Figure 6 shows the relationship between the address and data inside the RAM on either the right or left screen (64￿64 dots). In this case, the display start line is 0.

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