ATA REGISTERS |
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DEVICE ADDRESS REGISTER
The Device Address register is used to maintain compatibility with ATA disk drive interfaces.
Table 28: Device Address Register
Operation | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
Read/Write | - | nWTG | nHS3 | nHS2 | nHS1 | nHS0 | nDS1 | nDS0 |
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Default Value | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 |
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Bit(s) Description
7 Reserved bit.
6 Write Gate (nWTG). Low when a write to the device is in process.
1nDS1. Low when drive 1 is selected and active.
0nDS0. Low when drive 0 is selected and active.
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PAGE 27 | FEBRUARY 2, 2009 |