Silicon Laboratories SI4734/35-B20 manual Sclk Sdio, Si4734/35-B20, Rev

Si4734/35-B20

tSU:STA tHD:STA tLOW tHIGH tr:IN tf:IN tSP tSU:STO tBUF

SCLK

SDIO

70%

30%

70%

30%

START	tr:IN	tHD:DAT tSU:DAT	tf:IN,	STOP	START
			tf:OUT

Figure 2. 2-Wire Control Interface Read and Write Timing Parameters

SCLK

SDIO

A6-A0,	D7-D0	D7-D0
R/W

	ACK	DATA	ACK	DATA	ACK	STOP
START ADDRESS + R/W

Figure 3. 2-Wire Control Interface Read and Write Timing Diagram

8 Rev. 1.0