Sony MZ-300 specifications Avss, Xin, Lrco, Fseq, Nweb, Defect, Wrqb

MZ-E300

Pin No.	Pin name	I/O	Description
46	MAD2	O*	Address output to DRAM (NC)
47	SLPWMR	O*	Sled PWM output
48	MAD1	O*	Address output to DRAM (NC)
49	FOPWMF	O*	Focus PWM output
50	MAD0	O*	Address output to DRAM (NC)
51	FOPWMR	O*	Focus PWM output
52	TRPWMF	O*	Tracking PWM output
53	TRPWMR	O*	Tracking PWM output
54	MAD10	O*	Address output to DRAM (NC)
55	AVDD	—	Power supply for 1bit DAC
56	OUTL	O	1bit DAC L channel output
57	OUTR	O	1bit DAC R channel output
58	AVSS	—	Ground for 1bit DAC
59	VDD2	—	Power supply
60	XIN	I	16.9344MHz oscillation input
61	XOUT	O	16.9344MHz oscillation output
62	VSS	—	Ground
63	VDD1	—	Internal power supply
64	F16M	O*	16.9344MHz output
65	ENH	O*	De-emphasis instruction output
66	LRCO	O*	LR clock output
67	DDATA	O*	Audio expansion data output
68	BCO	O*	Bit clock output
69	DDOUT	O*	Digital audio output
70	SMON3	O*	Monitor signal output
71	SMON2	O*	Monitor signal output
72	SMON1	O*	Monitor signal output
73	SMON0	O*	Monitor signal output
74	FSEQ	O*	Frame sync. detection signal output
75	VP	O*	CLV servo lock decision output
76	MRASBT	O*	Output for test
77	MRASB	O*	RAS signal output to DRAM (NC)
78	FOK	O*	Focus OK signal output
79	NWEB	O*	WE signal output to DRAM (NC)
80	DEFECT	O*	Defect signal output
81	MD1	I/O	Data input/output to/from DRAM
82	FG	I	Speed pulse input
83	CL	I	Data transferring clock input for CPU interface
84	CE	I	Chip enable signal input for CPU interface
85	MDO	I/O	Data input/output to/from DRAM
86	DI	I	Data input for CPU interface
87	VDD1	—	power supply
88	DO	O	Data output for CPU interface
89	VDD2	—	Power supply
90	VSS	—	Ground
91	MD3	I/O	Data input/output to/from DRAM
92	WRQB	O	Interruption output for CPU interface
93	INTB	O	Interruption output for CPU interface
94	ADIPWO	I	Wobbly signal input

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