Sony MZ-B100 specifications Pin No, Pin name, Description

MZ-B100

• IC801 CXD2671-209GA (SYSTEM CONTROLLER, DIGITAL SIGNAL PROCESSOR, 16M BIT D-RAM)

Pin No.	Pin name	I/O	Description
1	MICAMP CTL	O	MIC AMP ON/OFF control output
2	XHP DET	I	Headphones connection detect input
3	V UP	O	Volume control output
4	SP AMP	O	Speaker amplifier ON/OFF control output
5	XMONO MODE	O	MONO/STEREO control output
6	MCUVDD0	—	Power supply terminal (for microcomputer block) (+1.5V)
7	MIFVSS3	—	Ground terminal (for microcomputer I/F)
8	XRST	I	System reset signal input terminal from the power control (IC901)		“L”: reset
9	S MON	I	Servo signal monitor input terminal (A/D input) from RF amp (IC501)
10	VB MON	I	Voltage monitor input terminal of UNREG power supply (A/D input)
11	CHG MON	I	Charge voltage monitor input terminal (A/D input) from IC601
12	VREF MON	I	Clear reference monitor voltage input terminal (A/D input) from RF amp (IC501)
13 to 15	SET KEY 1 – 3	I	Key input terminal from the switch & LCD module (A/D input)
16	HIDC MON	I	HIGH DC voltage monitor input terminal (A/D input)
17	WK DET	I	Set key start switching detection signal input terminal (A/D input)
18	REC KEY	I	REC key input terminal (A/D input)
19	HALF LOCK SW	I	Open button detection switch (S805) input terminal (A/D input)		Input “L” when the
			open button is pressed. Input “H” in other cases.
20	RMC KEY	I	Key input terminal (A/D input) from the remote commander attached headphone
21	AVDD	—	Power supply terminal (for the analog circuit block) (+2.8V)
22	AVSS	—	Ground terminal (for the analog circuit block)
23	VDIOSC	—	Power supply terminal (for OSC cell) (+2.4V)
24	OSCI	I	System clock (45.1584MHz) input terminal
25	OSCO	O	System clock (45.1584MHz) output terminal
26	VSIOSC	—	Ground terminal (for OSC cell)
27	DAVDD	—	Power supply terminal (for the built-in D/A converter) (+2.4V)
28	VREFL	I	Reference voltage input terminal (for the internal D/A converter L-CH)
29	AOUTL	O	Built-in D/A converter (L-CH) output terminal
30	AOUTR	O	Built-in D/A converter (R-CH) output terminal
31	VREFR	I	Reference voltage input terminal (for the built-in D/A converter R-CH)
32	DAVSS	—	Ground terminal (for the built-in D/A converter)
33	ASYO	O	Playback EFM duplex signal output terminal
34	ASYI	I	Playback EFM comparison slice level input terminal
35	AVD1	—	Ground terminal (for the analog) (+2.4V)
36	BIAS	I	Bias current input terminal for the playback EFM comparison
37	RFI	I	Playback EFM RF signal input from RF amp (IC501)
38	AVS1	—	Ground terminal (for the analog)
39	PCO	O	Phase comparison output terminal for the playback EFM system master PLL
40	PDO	O	Phase comparison output terminal for the analog PLL	Not used (open)
41	FILI	I	Filter input terminal for the playback EFM system master PLL
42	FILO	O	Filter output terminal for the playback EFM system master PLL
43	CLTV	I	Internal VCO control voltage input for the playback EFM system master PLL
44	PEAK	I	Peak hold signal input of the light amount signal (RF/ABCD) from RF amp (IC501)
45	BOTM	I	Bottom hold signal input of the light amount signal (RF/ABCD) from RF amp (IC501)
46	ABCD	I	Light amount signal (ABCD) input from RF amp (IC501)
47	FE	I	Focus error signal input from RF amp (IC501)
48	AUX1	I	Support signal (I3 signal/temperature signal) input terminal (A/D input)
49	VC	I	Middle point voltage (+1.2V) input terminal
50	ADIO	O	Monitor output terminal of A/D converter input signal	Not used (open)
51	ADRT	I	A/D converter the upper limit voltage input terminal (fixed at “H” in this set)

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