Motherboard Description | SY-K7VTA |
buffers and sixteen levels (doublewords) of prefetch buffers are included for concurrent PCI bus and DRAM/cache accesses. The chip also supports enhanced PCI bus commands such as Memory-Read-Line, Memory-Read-Multiple and Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are supported such as snoop ahead, snoop filtering, L1/L2 write-back forward to PCI master, and L1/L2 write-back merged with PCI post write buffers to minimize PCI master read latency and DRAM utilization. Delay transaction and read caching mechanisms are also implemented for further improvement of overall system performance.
ØVT82C686A
The VT82C686A PSIPC (PCI Super-I/O integrated Peripheral Controller) is a high integration, high performance, power-efficient, and high compatibility device that supports AMD and non-AMD based processor to PCI bus bridge functionality to make a complete Microsoft PC99- compliant PCI/ISA system In addition to complete ISA extension bus functionality, the VT82C686A includes standard AMDligent peripheral controllers:
1)Master mode enhanced IDE controller with dual channel DMA engine and interlaced dual channel commands. Dedicated FIFO coupled with scatter and gather master mode operation allows high performance transfers between PCI and IDE \devices. In addition to standard PIO and DMA mode operation, the VT82C686A also supports the UltraDMA-33 standard to allow reliable data transfer rates up to 33MB/sec throughput. The VT82C686A also supports the UltraDMA-66 standard. The IDE controller is SFF-8038I v1.0 and Microsoft Windows-family compliant.
2)Universal Serial Bus controller that is USB v1.1 and Universal HCI v1.1 compliant. The VT82C686A includes the root hub with four function ports with integrated physical layer transceivers. The USB controller allows hot plug and play and isochronous peripherals to be inserted into the system with universal driver support. The controller also implements legacy keyboard and mouse support so that legacy