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Introduction

Table 1. I/O Description (continued)

Jack Description
J5–GND Ground
JP1–LOW Ground
JP1–TTC Timercapacitor pin
JP1–HI Pull-upvoltage source
JP2–HI Pull-upvoltage source
JP2–LEDPWR LEDPull-up power line
JP3–VREF ICreference voltage VREF
JP3–VPULLUP Pull-upvoltage source
JP3–EXT Externalvoltage supply from J2
JP4–VCC Pull-upvoltage source of ACDRV and BATDRV LED logic circuit
JP4–VCOM Q7and Q11 common source
JP5–HI Pull-upvoltage source
JP5–CHGEN Chargeenable
1.4 1.4 Controls and Key Parameters Setting

Table 2. Controls and Key Parameters Setting

Jack Description FactorySetting
TTCsetting
1-2: Connect TTC to GROUND (Disable termination and the safety timer)
JP1 Jumperon 2-3 (TTC and VPULLUP)
2-3: Connect TTC to VPULLUP (Allow termination, but disable the safety time)
2floating: Allow termination, CTTC sets the safety timer
Thepull-up power source supplies the LEDs when on.
JP2 JumperOn
LEDhas no power source when off.
VPULLUPsetting JumperOn 1-2 (VPULLUP and
JP3 1-2: Connect VPULLUP to VREF VREF)
2-3: Connect VPULLUP to VEXT
JP4 Thepull-up voltage source of ACDRV and BATDRV LED logic circuit. Jumperon
CHGENsetting
JP5 Jumperon: CHGEN to VPULLUP Jumper Off
Jumperoff: CHGEN is set to low by pull down resistor.
1.5 Recommended Operating Conditions

Table 3. Recommended Operating Conditions

Symbol Description Min Typ Max Unit
24(617)
Supplyvoltage, VIN Input voltage from ac adapter input 5 24 28 V
(610/616/63x)
2.1(61x) 21(61x)
Batteryvoltage, VBAT Voltage applied at VBAT terminal of J5 V
1.8(63x) 18(63x)
Maximuminput current from ac adapter
Supplycurrent, IAC 0 4.5 A
input
Chargecurrent, Ichrg Battery chargecurrent 2 3 8 A
Operatingjunction 0 125 °C
temperaturerange, TJ

The bq2461x/bq2463x EVM board requires a regulated supply approximately 0.5 V minimum above the

regulated voltage of the battery pack to a maximum input voltage of 28 VDC.

3
SLUU396A–January 2010 –Revised July 2010 bq2461x/bq2463xEVM (HPA422) Multi-Cell Synchronous Switch-Mode Charger
Copyright© 2010, Texas Instruments Incorporated