R
ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)
Table 2: IBA_PLBv46 Design Parameters (Continued)
Generic | Feature/Description | Parameter Name |
| Allowable Values | Default | VHDL |
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| Value | Type |
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G8 | PLB Address Bus Width | C_PLBV46_AWIDTH |
| 32 | 32 | Integer |
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G9 | PLB Data Bus Width | C_PLBV46_DWIDTH |
| 32,64,128 | 64 | Integer |
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| IBA Storage Options and Trig Out |
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G10 | Number of data samples captured for every | C_NUM_DATA_SAMPLES |
| 512, 1024, 2048, | 1024 | Integer |
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| trigger match. Note that the range of |
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| 4096, 8192, 16384, |
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| acceptable values depends on the |
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| 32768, 65536, |
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| C_FAMILY value. |
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| 131072 |
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G11 | Number of sequencer levels. If 0 then no | C_MAX_SEQUENCER_ |
| 0 | Integer |
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| sequencer is used. | LEVELS |
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G12 | 1=Enable data store qualification (filtering) | C_ENABLE_STORAGE_ |
| 0,1 | 1 | Integer |
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| 0=Disable | QUALIFICATION |
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G13 | Enable Trigger Out | C_ENABLE_TRIGGER_OUT |
| 1,0 | 0 | Integer |
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| Trigger In, PLB Reset, and PLB Error Status |
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G14 | Use system reset and error status signals | C_USE_MU_1A_RST_ERR_ |
| 1,0 | 1 | Integer |
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| STAT |
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G15 | Use master error status signals | C_USE_MU_1B_MSTR_RST_ |
| 1,0 | 0 | Integer |
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| ERR_STAT |
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G16 | Use iba_trig_in | C_USE_MU_1C_TRIG_IN |
| 1,0 | 0 | Integer |
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G17 | Trigger in width, 0=disable | C_MU_1_TRIG_IN_WIDTH |
| 0 | Integer |
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G18 | 0=basic, 1=basic w/ edges | C_MU_1_TYPE_TRIG_RST_ |
| 0,1 | 0 | Integer |
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| ERR_STAT |
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G19 | Match unit counter width. 0 means do not | C_MU_1_CNT_W_TRIG_ |
| 0 | Integer |
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| use. | RST_ERR_STAT |
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G20 | 1=Enable storing MU 1 signals in the data | C_MU_1_EN_STORE_TRIG_ |
| 0,1 | 1 | Integer |
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| sample storage buffer. | RST_ERR_STAT |
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| 0=Disable |
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| C_USE_MU_1A or C_USE_MU_1B must |
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| be 1 in order to store. |
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| PLB Grouped Control Bus |
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G21 | Use the grouped control bus signals | C_USE_MU_2A_STD_CTL |
| 1,0 | 1 | Integer |
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G22 | Use the grouped size and byte enable | C_USE_MU_2B_SIZE_BE |
| 1,0 | 1 | Integer |
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G23 | Use PLB_TAttribute signals | C_USE_MU_2C_TATTR |
| 1,0 | 1 | Integer |
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G24 | Number of match units to use | C_MU_2_NUM_GRP_CTL |
| 1,2 | 1 | Integer |
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G25 | 0=basic, 1=basic w/ edges | C_MU_2_TYPE_GRP_CTL |
| 0,1 | 0 | Integer |
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G26 | Match unit counter width. 0 means do not | C_MU_2_CNT_W_GRP_CTL |
| 0 | Integer |
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| use |
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G27 | 1=Enable storing MU 2 signals in the data | C_MU_2_EN_STORE_GRP_ |
| 0,1 | 1 | Integer |
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| sample storage buffer. | CTL |
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| 0=Disable |
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| C_USE_MU_2A_STD_CTL or |
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| C_USE_MU_2B_SIZE_BE or |
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| C_USE_MU_2C_TATTR must be 1 in order |
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| to store. |
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| PLB Address |
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G28 | Use PLB_ABus | C_USE_MU_3A_ABUS |
| 1,0 | 1 | Integer |
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G29 | Use PLB_UABus | C_USE_MU_3B_UABUS |
| 1,0 | 1 | Integer |
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DS619 (v1.0) September 17, 2007 | www.xilinx.com |
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Product Specification |
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| 6 | ||
