Zetex Semiconductors PLC zxld1350ev2 ZXLD1350EV2 User Guide Iss, 10-04-07, Schematic Diagram

Models: zxld1350ev2

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ZXLD1350EV2 EVALUATION BOARD

ZXLD1350EV2

ZXLD1350EV2 EVALUATION BOARD

REFERENCE DESIGN

The ZXLD1350EV2 is configured to the reference design in Figure 2. The target application is a driver for one or more series-connected 1W white LEDs for torches and other high powered LED driving applications.

The operating voltage is a nominal 24V. For three 1W series-connected LEDs, the voltage can be from 12V minimum to 30V maximum. The nominal current is set at 300mA with a 0.33Ω sense resistor, Rs. For three series - connected 1–watt LEDs, with a nominal supply of 24V, the ZXLD1350 runs in continuous mode at 545kHz, with a 100uH inductor.

Jumpers J1, J2 and J3 allow selection of the number of LEDs to be connected in series. Jumper on at J1 bypasses LED D1. Jumper on at J3 bypasses LED D3. Removing jumper J2 disconnects all the 1-watt LEDs from the current flow path. Jumper 2 also doubles as a connection point for an ammeter to measure the LED current.

Both DC and PWM dimming can be achieved by driving the ADJ pin. For DC dimming, the ADJ pin may be driven between 0.3V and 1.25V. Driving the ADJ pin below 0.2V will shutdown the output current. For PWM dimming, an external open-collector NPN transistor or open-drain N-channel MOSFET can be used to drive the ADJ pin. The PWM frequency can be low, around 100Hz to 1kHz, or high between 10kHz to 50kHz. C3 should not be fitted on the evaluation board when using the PWM dimming feature. Shorting R1 will connect the test pin ADJ to device pin ADJ. The capacitor C3 should be around 10nF to decouple high frequency noise at the ADJ pin for DC dimming.

The soft-start time will be nominally 0.5ms without capacitor C3. Adding C3 will increase the soft start time by approximately 0.5ms/nF

For other reference designs or further applications information, please refer to the ZXLD1350 datasheet.

Schematic Diagram

Figure 2 shows the schematic for the ZXLD1350EV2 evaluation board.

Figure 2: Schematic for the evaluation board ZXLD1350EV2

ZXLD1350 Operation

In normal operation, when voltage is applied at +VIN, the ZXLD13350 internal NDMOS switch is turned on. Current starts to flow through sense resistor Rs, inductor L1, and the LEDs. The current ramps up linearly, and the ramp rate is determined by the input voltage +VIN and the inductor L1. This rising current produces a voltage ramp across Rs. The internal circuit of the ZXLD1350 senses the voltage across Rs and applies a proportional voltage to the input of the internal comparator. When this voltage reaches an internally set upper threshold, the NDMOS switch is turned off. The inductor current continues to flow through Rs, L1, the LEDs, the schottky diode SD1, and back to the supply rail, but it decays, with the rate of decay determined by the forward voltage drop of the LEDs and the schottky diode. This decaying current produces a falling voltage at Rs, which is sensed by the ZXLD1350. A voltage proportional to the sense voltage across Rs is applied at the input of the internal comparator. When this voltage falls to the internally set lower threshold, the NDMOS switch is turned on again. This switch-on-and-off cycle continues to provide the average LED current set by the sense resistor Rs. Please refer to the datasheets for the threshold limits, ZXLD1350 internal circuits, electrical characteristics and parameters.

ZXLD1350EV2 User Guide Iss 5

10-04-07

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Zetex Semiconductors PLC zxld1350ev2 manual ZXLD1350EV2 User Guide Iss, 10-04-07, Schematic Diagram, ZXLD1350 Operation