Intel Intel NetStructure Single Board Computer, MPCBL0010 manual Tables

Page 9


—MPCBL0010
Tables
1	Supported Memory Configurations		18
2	Jumper Definitions		26
3	Suggested Method of BIOS Image Synchronization prior to BIOS Upgrade		33
4	Flashlnx Utility Command Line Options		35
5	Environmental Specifications		37
6	Reliability Estimate Data		38
7	Power Requirements		39
8	Total Measured Power		39
9	Weight		39
10	On-board and Backplane Connector Assignments		41
11	Front Panel Connector Assignments		42
12	Power Distribution Connector (Zone 1) P10 Pin Assignments		44
13	AdvancedTCA Data Transport Connector (Zone 2) J23 Pin Assignments		46
14	AdvancedTCA* Data Transport Connector (Zone 2) J20 Pin		46
15	POST Code Connector Pin Assignments		47
16	Ethernet 10/100 Debug Connector Pin Assignments		48
17	Ethernet 10/100 Debug Connector LED Operation		48
18	USB Connector (J4) Pin Assignments		49
19	Serial Port Connector (J5) Pin Assignments		50
20	AdvancedMC* Connector Pin Assignments		51
21	Front Panel LED Descriptions		54
22	Ethernet 10/100 Debug Connector LED Operation		55
23	Supervisor and User Password Functions		60
24	Function Key Escape Code Equivalents		60
25	BIOS Setup Program Menu Bar		62
26	BIOS Setup Program Function Keys		62
27	Main Menu		63
28	Advanced Menu		64
29	CPU Configuration Sub-Menu		65
30	IDE Configuration Sub-Menu		66
31	IDE Master/Slave Sub-Menu		67
32	SuperIO Configuration Sub-Menu		69
33	ACPI Configuration Sub-Menu		70
34	Advanced ACPI Configuration Sub-Menu		70
35	Chipset ACPI Configuration Sub-Menu		71
36	System Management Sub-Menu		72
37	Event Log Configuration Sub-Menu		73
38	PCI Express Error Masking Configuration Sub-Menu		73
39	MPS Configuration Sub-Menu		74
40	AdvancedTCA Channel Routing (PICMG) Sub-Menu		75
41	On-board Devices Configuration Sub-Menu		76
42	Option ROM Configuration Options		76
43	PCI Express* Configuration Sub-Menu		77
44	Remote Access Configuration Sub-Menu		78
45	IPMI Configuration Sub-Menu		79
46	LAN Configuration Sub-Menu		79
47	USB Configuration Sub-Menu		80
48	USB Mass Storage Device Configuration		81
49	PCIPnP Menu		81
50	Boot Menu		82
51	Boot Settings Configuration Sub-Menu		82
52	Boot Device Priority Sub-Menu		83
53	Hard Disk Drive Sub-Menu		84
	Intel NetStructure® MPCBL0010 Single Board Computer
October 2006		Technical Product Specification
Order Number: 304120			9

Image 9

Contents Intel NetStructure MPCBL0010 Single Board Computer Technical Product SpecificationOrder Number Contents 1.1 Weight1.2 1.310.8.1 Reset Bios Flash Type 10.8 OEM Ipmi CommandsPwrBtn usage Hardware Management Overview131 10.8.210.8.2.1 132Component Technology 179 Warranty Information 180 16.1 177178 20.5 Chinese Safety Warning Safety WarningsAdvancedMC Direct Connect Switch Block Diagram Warm Reset Block DiagramTables Supported Memory Configurations Jumper Definitions101 100102 103Hot Swap LED Signals 136 Reset Bios Flash Type 131Reset Actions 140 SOL Configuration Reference Script Command-line Options 151Date Revision Description Revision HistoryDocument Organization IntroductionGlossary Intelligent Platform Management Bus. Physical two-wire That allows your networked client computer to boot using aSee the Low Pin Count LPC Interface specification Phase-locked LoopFeature Overview ApplicationFunctional Description Chipset Low Voltage Intel Xeon ProcessorMemory Controller Hub Memory J10, J122.2 I/O Controller Hub 2.3 64-Bit PCI HubSupported Memory Configurations Timers4 I/O 4.1 I/O Controller HubGigabit Ethernet AdvancedMC AMC Connector J18, J194.5 10/100 Fast Ethernet 4.6 USBFirmware Hubs 6.1 FWH0 Main Bios6.2 FWH1 Backup/Recovery Bios Onboard Power SuppliesFlash ROM Backup Mechanism Power Feed FusesTelecom Clock IpmcAdvancedMC Direct Connect AdvancedTCA Compliance AdvancedMCA Direct Connect Switch Block DiagramJumpers Operating the UnitMPCBL0010 SBC Name Function with Jumper Present On Removed OffAdvancedMC Filler Panel AdvancedMC Filler PanelsRemove the cover Installing MemoryInsert two matched pair DIMMs Installing and Extracting the SBCChassis Extraction Chassis InstallationSolid blue Bios Configuration AdvancedMC Module Installation and ExtractionRemote Access Configuration Software UpdatesBios Updates Loading\Saving Custom Bios ConfigurationBios Image Command Behavior Saving BIOS.bin to the SBC Copying BIOS.bin from the SBCFlashlnx Command Line Options Ipmc Firmware UpdatesIpmc Firmware Upgrade Using the KCS Interface Flashlnx Utility Command Line OptionsDigital Ground to Chassis Ground Connectivity Digital Ground and Chassis Ground Isolated DefaultMechanical Specifications SpecificationsEnvironmental Specifications Board OutlineMean Time Between Failure Mtbf Specifications Reliability SpecificationsEnvironmental Assumptions General AssumptionsPower Requirements WeightPower Consumption General NotesConnectors and LEDs Backplane Description Connectors Connectors and LEDs-MPCBL0010 SBCFront Panel Description Connectors Front Panel Front Panel Connector AssignmentsPower Distribution Connector P10 Backplane ConnectorsAdvancedTCA Data Transport Connector J23 Power Distribution Connector Zone 1 P10 Pin AssignmentsPin Signal Description Data Transport Connector Zone 2 J23 AdvancedTCA* Data Transport Connector Zone 2 J20 Pin AdvancedTCA Data Transport Connector J20Alignment Blocks PinPost Code Connector J13 On-Board ConnectorsExtended IPT700 Debug Port Connector J25 Post Code Connector Pin AssignmentsEthernet 10/100 Debug Connector J3 Front Panel ConnectorsEthernet 10/100 Debug Connector LED Operation FunctionSerial Port Connector J5 USB Connector J4Serial Port Connector J5 Pin Assignments AdvancedMC* Connectors J18, J19AdvancedMC* Connector Pin Assignments LEDs AdvancedMC* ConnectorOOS OOS Front Panel LED Descriptions Sheet 1Front Panel LED Descriptions Sheet 2 Post LED CodesExample Post LED Codes Reset ButtonBios Flash Memory Organization Bios FeaturesRedundant Bios Functionality IntroductionBoot Options Recovering Bios DataLegacy USB Support Language SupportBios Security Features Fast Booting SystemsCD-ROM and Network Boot Booting without Attached DevicesFunction Key Escape Code Equivalents Sheet 1 Supervisor and User Password FunctionsKey Escape Sequence ESC OP ESC OQ ESC or ESC OSESC OW ESC OX Function Key Escape Code Equivalents Sheet 2ESC OY ESC OZBios Setup Program Menu Bar Bios SetupBios Setup Program Function Keys Main MenuBios ID Feature Options DescriptionAdvanced Menu Main MenuCPU Configuration Sub-Menu Advanced MenuPicmg IDE Configuration Sub-Menu Shows the sub-menu options for configuring the CPUCPU Configuration Sub-Menu IDE Configuration Sub-Menu Shows the IDE configuration optionsPrimary IDE Master/Slave Configuration Options Shows the IDE Master/Slave configuration optionsIDE Master/Slave Sub-Menu Shows SuperIO configuration options SuperIO Configuration Sub-MenuSuperIO Configuration Sub-Menu Acpi Configuration Sub-MenuChipset Acpi Configuration Sub-Menu Advanced Acpi Configuration Sub-MenuShows Acpi configuration options Acpi Configuration Sub-MenuSystem Management Sub-Menu Chipset Acpi Configuration Sub-MenuShows the System Management information Apic Acpi SCI IRQEvent Log Configuration Sub-Menu Shows event log configuration optionsSystem Management Sub-Menu PCI Express Error Masking Configuration Sub-Menu Event Log Configuration Sub-MenuPCI Express Error Masking Configuration Sub-Menu Shows MPS Configuration options MPS Configuration Sub-MenuMPS Configuration Sub-Menu AdvancedTCA* Channel Routing PICMG* Sub-MenuAdvancedTCA Channel Routing Picmg Sub-Menu On-board Devices Configuration Sub-MenuShows On-board Devices Configuration options PCI Express* Configuration Sub-MenuOn-board Devices Configuration Sub-Menu Option ROM Configuration OptionsRemote Access Configuration Sub-Menu Shows PCI Express configuration optionsPCI Express* Configuration Sub-Menu Ipmi Configuration Sub-Menu Shows remote access configuration optionsRemote Access Configuration Sub-Menu Ipmi Configuration Sub-Menu Shows the Ipmi configuration optionsShows the LAN configuration options LAN Configuration Sub-MenuUSB Configuration Sub-Menu Shows USB configuration optionsUSB Configuration Sub-Menu USB Mass Storage Device Configuration USB Mass Storage Device ConfigurationPCIPnP Menu PCIPnP MenuBoot Settings Configuration Sub-Menu Boot MenuBoot Menu Shows Boot Settings Configuration optionsBoot Settings Configuration Sub-Menu Sheet 2 Boot Device Priority Sub-MenuShows Boot Device Priority options Boot Device Priority Sub-MenuShows OS Load Timeout Timer options OS Load Timeout Timer Sub-MenuHard Disk Drives Sub-menu Shows Hard Disk Drives optionsShows passwords and security features OS Load Timeout Timer Sub-MenuSecurity Menu Chipset MenuDescribes the sub-menus used to select chipset features Northbridge Configuration Sub-MenuNorthbridge Chipset Configuration Chipset MenuSpread Spectrum Clocking Mode Configuration Spread Spectrum Clocking Mode Sub-MenuExit Menu Exit MenuExit Menu Bios Error Messages Error MessagesBios Error Messages Cmos Checksum BAD Clear Cmos Jumper enabledPost Code Checkpoints Bootblock Initialization Code CheckpointsCheckpoint Description SmramEarly CPU Init Exit Acpi Runtime Checkpoints DIM Code CheckpointsPCI Configuration Map PCI Configuration MapAddressing Lists the PCI devices and the bus on which they resideAMC B2 AMC B1 Symbol Description Fpga RegistersFpga Register Legend Fpga Register Overview Post Codes 0080hExtended Post Codes 0081h Version Programmable logic version Fpga Version 0A00hDebug LED 0A01h Address ActionFwum 0A02h Development Features 0A04hFwum Ready Fwum Busy PCB PCB versionHwmode Holos MS2 MS1 Refalign FCS E3DS3 Telecom Clock Register 0 0A08hTelecom Clock Register 2 0A0Ah Telecom Clock Register 1 0A09hTransmission Frequency Selection Telecom Clock Register 3 0A0BhTelecom Clock Register 4 0A0Ch TXREFxSEL2..0 Transmission Clock Frequency0xA0D Write Reset Telecom Clock Register 6 0A0EhUnlock Hldovr SEC10 SEC01 PRI10 PRI01 Telecom Clock Register 7 0A0Fh Ipmc AddressesIpmc Register Legend Address FunctionSBC Control 00h Ltype Ltest Uart BrstHT0 PwrBtn usage Post Code Low 02h SBC Status 01hPost Code High 03h LED Color Control 06hAdvancedMC B1 Control & Status 11h AdvancedMC B1 Control & Status 10hAdvancedMC B2 Control & Status 13h AMC B2 Control & Status 12hADC Grab Control 20h CPU 0 VIDs 18hVID5 VID4 VID3 VID2 VID1 VID0 Mcerr HOT Trip VTT IerrADC1 and ADC2 Grab Data 21-22h Fabric Control 1 24hPCB 3VOC Default configuration connects FWH0 and FWH1 to the ICH Reset Source 27hReset Events 29h Fabric Control 2 25hCrosspoint Switch Control 2Ah Crosspoint Switch Data 2Bh Crosspoint Switch Ports RegisterMiscellaneous Controls and Status 2Dh Ipmc Post Codes FEhVersion FFh Address Action FFh Read Reserved Version Write PowerUpIntelligent Platform Management Controller Ipmc Hardware Management OverviewIpmc Block Diagram Hardware Sensors Sheet 1 Sensor Data Record SDRGreen to Red State M1Hardware Sensors Sheet 2 Hardware Sensors Sheet 3 Hardware Sensors Sheet 4 OEM Sensor TypesOEM Name OEM Number Description OEM Event/Reading Type System Event Log SELSEL Events Supported Sheet 1 Sensor Sensor Type Specific Event Description CodePCI Serr SEL Events Supported Sheet 2PCI Perr SO/GOSEL Events Supported Sheet 3 SEL Events Supported Sheet 4 When name is FIA FRU InitializationSEL Events Supported Sheet 5 Sensor Sensor Type Specific Event Description Code OffsetOEM Field Replaceable Unit FRU Information Ipmb Link SensorVariable Size Data Type Bytes ASC-IICustomizable FRU Area LinuxCustFru Utility UsageFRU Customer Area Seecommon Example 1. Input FileAB AC AD AE AF Keying OEM Ipmi CommandsReset Bios Flash Type Reset Bios Flash TypeBoard Device Channel Port Selection Identifiers Channel Port Selection IdentifiersSetBoardDeviceChannelPortSelection SetBoardDeviceChannelPortSelectionResponse GetBoardDevicePossibleSelection GetBoardDeviceChannelPortSelectionGetBoardDeviceChannelPortSelection GetBoardDevicePossibleSelectionGet Control State Set Control StateControls Identifier Table Set Control StateControls Identifier Hot Swap ProcessControl Description Control Number FWHAdvancedMC Module Activation Hot Swap LED SignalsHot Swap LED LED Status MeaningPre-Defined Resources for AdvancedMC Modules Temperature and Voltage SensorsSensors and Thresholds Version SDR System Acpi Power State System Firmware Progress Post ErrorProcessor Events Dimm Memory EventsReset Actions ResetReset Action System Function Memory Status Ipmb Link SensorHard Reset Warm ResetIpmc Firmware Code Ipmc Firmware Code Process MPCBL0010 SBC-Hardware Management Overview References Serial Over LAN SOLSOL Architecture SOL ImplementationSOL Block Diagram Architectural Components Theory of OperationFront Panel Serial Port or Rear Transition Module Serial Over LANSerial Over LAN Client Reference Configuration ScriptSupported Usage Model Configuring the Blade for SOLDefault Behavior SOL Configuration Reference Script referencecfgReference Script referencecfg SOL User InformationSOL Configuration Reference Script Command-line Options Command Line OptionsSOL Parameters Channel ParametersSetting up a Serial Over LAN Session Target Blade SetupBios Configuration Change the serial parameter to read Operating System ConfigurationFor Rhel Change the kernel line to readExecute the referencecfg Script Sbcutils RPM InstallationScript executed on the Intel CMM Execute this command to configure SOL on the target bladeConfigure the Ethernet Port Client Blade SetupExecute this command to restart the network For RedHat* Rhel Configure IP address of the Ethernet portInstalling ipmitool Checking SOL ConfigurationStart an SOL Session OEM Ending an SOL SessionOperating Systems for SOL Client ipmitool Telecom Clock Block Diagram of the Telecom ClockFunction Description Interface DescriptionConfiguration Recovered Clock SelectionAlarm Handling Operational ConfigurationTelecom Clock API Enable/Disable Transmission ClockModule Transmission Frequency Selection Name Used For ValueAutomatic Switchover Recovered ClockAutomatic Switchover Mode Automatic Switchover ValuesSelect Reference Clock Reference Frequency for PLLPrimary/Secondary Redundant Clock Hardware Reset PLL Operating ModeCorner Frequency Reference Clock AlignmentHardware Reset Values Read Alarm StatesAlarm State Values Read New EventsSysfs Interface Read the Current Reference ClockReference Clock Values Telecom Clock API Function Mapping for the sysfs InterfaceTelecom Clock Registers 80hA10-A1Fh October Technical Product Specification Order Number 171 DRVCLKB1 DRVCLKA1 DRVCLKB0 DRVCLKA0 Addres Action UNLOCK10 UNLOCK01 HLDOVR10 HLDOVR01 SEC10 SEC01 PRI10 PRI01 October Technical Product Specification Order Number 175 Bit Write Read FPGA/PLD Serial Link Bit DefinitionDiagnostics MaintenanceSupervision In-Target Probe ITPThermals Power vs. Flow RateComponent Technology Warranty Information Returning a Defective Product RMAFor the Americas For Europe, Middle East, and Africa Emea For Asia and Pacific ApacLimitation of Liability and Remedies MPCBL0010 SBC-Warranty Information Customer Support Technical Support and Return for Service AssistanceCustomer Support Sales AssistanceVcci Cisprzz CertificationsAgency Information-Class B North America FCC Class BJapan Vcci Class B Korean Class B Australia, New Zealand Safety Warnings Mesures de Sécurité Sicherheitshinweise Norme di Sicurezza Instrucciones de Seguridad Chinese Safety Warning Appendix a Reference Documents MPCBL0010 SBC-Reference Documents Ipmi 1.5 Supported Commands Sheet 1 Appendix B List of Supported Commands Ipmi v1.5 and PicmgFRU Device Commands NetFn Ipmi 1.5 Supported Commands Sheet 2Command NetFn Interface Picmg 3.0 Ipmi Supported Commands