Intel Intel NetStructure Single Board Computer, MPCBL0010 Advanced Acpi Configuration Sub-Menu

Page 71

MPCBL0010 SBC—BIOS Setup

Main Advanced PCIPnP Boot Security Chipset Exit

Remote Access Configuration

IPMI Configuration

USB Configuration

Table 33 shows ACPI configuration options.

Table 33.

ACPI Configuration Sub-Menu

 

 

 

 

 

 

Feature

Options

Description

 

 

 

 

 

Advanced ACPI

 

Configure advanced ACPI options.

 

Configuration

 

 

 

 

 

 

 

 

 

Chipset ACPI

 

Configure ACPI chipset options.

 

Configuration

 

 

 

 

 

 

 

 

7.3.4.1Advanced ACPI Configuration Sub-Menu

To access this sub-menu, select Advanced on the menu bar, select ACPI Configuration, then Advanced ACPI Configuration.

Table 34 shows Advanced ACPI configuration options.

Table 34.

Advanced ACPI Configuration Sub-Menu

 

 

 

 

 

Feature

Options

Description

 

 

 

 

 

ACPI 2.0 Support

No

Enable RSDP pointers to 64-bit fixed system description tables.

 

Yes

 

 

 

 

 

 

 

 

ACPI APIC support

Disabled

Include ACPI APIC table pointer to RSDT pointer list.

 

Enabled

 

 

 

 

 

 

 

 

AMI OEMB table

Disabled

Include OEMB table to R(X)SDT pointer lists.

 

Enabled

 

 

 

 

 

 

 

 

Headless Mode

Disabled

Enable/Disable Headless operation mode through ACPI.

 

Enabled

 

 

 

 

 

 

 

Note: Bold text indicates default setting.

7.3.4.2Chipset ACPI Configuration Sub-Menu

To access this sub-menu, select Advanced on the menu bar, select ACPI Configuration, then Chipset ACPI Configuration.

Table 35 shows ACPI configuration options.

Intel NetStructure® MPCBL0010 Single Board Computer

 

Technical Product Specification

October 2006

70

Order Number: 304120

Page 70 Page 72
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Page 70 Page 72
Contents Intel NetStructure MPCBL0010 Single Board Computer Technical Product SpecificationOrder Number Contents 1.3 Weight1.1 1.2Hardware Management Overview 10.8 OEM Ipmi Commands10.8.1 Reset Bios Flash Type PwrBtn usage132 10.8.2131 10.8.2.1178 Component Technology 179 Warranty Information 180 16.1177 Warm Reset Block Diagram Safety Warnings20.5 Chinese Safety Warning AdvancedMC Direct Connect Switch Block DiagramTables Supported Memory Configurations Jumper Definitions103 100101 102SOL Configuration Reference Script Command-line Options 151 Reset Bios Flash Type 131Hot Swap LED Signals 136 Reset Actions 140Date Revision Description Revision HistoryDocument Organization IntroductionGlossary Phase-locked Loop That allows your networked client computer to boot using aIntelligent Platform Management Bus. Physical two-wire See the Low Pin Count LPC Interface specificationFunctional Description Feature OverviewApplication Chipset Low Voltage Intel Xeon Processor2.3 64-Bit PCI Hub Memory J10, J12Memory Controller Hub 2.2 I/O Controller Hub4.1 I/O Controller Hub TimersSupported Memory Configurations 4 I/O4.6 USB AdvancedMC AMC Connector J18, J19Gigabit Ethernet 4.5 10/100 Fast EthernetFirmware Hubs 6.1 FWH0 Main BiosPower Feed Fuses Onboard Power Supplies6.2 FWH1 Backup/Recovery Bios Flash ROM Backup MechanismTelecom Clock IpmcAdvancedMC Direct Connect AdvancedTCA Compliance AdvancedMCA Direct Connect Switch Block DiagramJumpers Operating the UnitMPCBL0010 SBC Name Function with Jumper Present On Removed OffAdvancedMC Filler Panel AdvancedMC Filler PanelsRemove the cover Installing MemoryInsert two matched pair DIMMs Installing and Extracting the SBCChassis Extraction Chassis InstallationSolid blue Software Updates AdvancedMC Module Installation and ExtractionBios Configuration Remote Access ConfigurationBios Image Command Behavior Bios UpdatesLoading\Saving Custom Bios Configuration Saving BIOS.bin to the SBC Copying BIOS.bin from the SBCFlashlnx Utility Command Line Options Ipmc Firmware UpdatesFlashlnx Command Line Options Ipmc Firmware Upgrade Using the KCS InterfaceDigital Ground to Chassis Ground Connectivity Digital Ground and Chassis Ground Isolated DefaultBoard Outline SpecificationsMechanical Specifications Environmental SpecificationsGeneral Assumptions Reliability SpecificationsMean Time Between Failure Mtbf Specifications Environmental AssumptionsGeneral Notes WeightPower Requirements Power ConsumptionConnectors and LEDs Backplane Description Connectors Connectors and LEDs-MPCBL0010 SBCFront Panel Description Connectors Front Panel Front Panel Connector AssignmentsPower Distribution Connector P10 Backplane ConnectorsPin Signal Description AdvancedTCA Data Transport Connector J23Power Distribution Connector Zone 1 P10 Pin Assignments Data Transport Connector Zone 2 J23 Pin AdvancedTCA Data Transport Connector J20AdvancedTCA* Data Transport Connector Zone 2 J20 Pin Alignment BlocksPost Code Connector Pin Assignments On-Board ConnectorsPost Code Connector J13 Extended IPT700 Debug Port Connector J25Function Front Panel ConnectorsEthernet 10/100 Debug Connector J3 Ethernet 10/100 Debug Connector LED OperationSerial Port Connector J5 USB Connector J4Serial Port Connector J5 Pin Assignments AdvancedMC* Connectors J18, J19AdvancedMC* Connector Pin Assignments LEDs AdvancedMC* ConnectorOOS OOS Front Panel LED Descriptions Sheet 1Front Panel LED Descriptions Sheet 2 Post LED CodesExample Post LED Codes Reset ButtonIntroduction Bios FeaturesBios Flash Memory Organization Redundant Bios FunctionalityLanguage Support Recovering Bios DataBoot Options Legacy USB SupportBooting without Attached Devices Fast Booting SystemsBios Security Features CD-ROM and Network BootESC OP ESC OQ ESC or ESC OS Supervisor and User Password FunctionsFunction Key Escape Code Equivalents Sheet 1 Key Escape SequenceESC OZ Function Key Escape Code Equivalents Sheet 2ESC OW ESC OX ESC OYMain Menu Bios SetupBios Setup Program Menu Bar Bios Setup Program Function KeysMain Menu Feature Options DescriptionBios ID Advanced MenuPicmg CPU Configuration Sub-MenuAdvanced Menu CPU Configuration Sub-Menu IDE Configuration Sub-MenuShows the sub-menu options for configuring the CPU IDE Configuration Sub-Menu Shows the IDE configuration optionsIDE Master/Slave Sub-Menu Primary IDE Master/Slave Configuration OptionsShows the IDE Master/Slave configuration options Shows SuperIO configuration options SuperIO Configuration Sub-MenuSuperIO Configuration Sub-Menu Acpi Configuration Sub-MenuAcpi Configuration Sub-Menu Advanced Acpi Configuration Sub-MenuChipset Acpi Configuration Sub-Menu Shows Acpi configuration optionsApic Acpi SCI IRQ Chipset Acpi Configuration Sub-MenuSystem Management Sub-Menu Shows the System Management informationSystem Management Sub-Menu Event Log Configuration Sub-MenuShows event log configuration options PCI Express Error Masking Configuration Sub-Menu PCI Express Error Masking Configuration Sub-MenuEvent Log Configuration Sub-Menu AdvancedTCA* Channel Routing PICMG* Sub-Menu MPS Configuration Sub-MenuShows MPS Configuration options MPS Configuration Sub-MenuAdvancedTCA Channel Routing Picmg Sub-Menu On-board Devices Configuration Sub-MenuOption ROM Configuration Options PCI Express* Configuration Sub-MenuShows On-board Devices Configuration options On-board Devices Configuration Sub-MenuPCI Express* Configuration Sub-Menu Remote Access Configuration Sub-MenuShows PCI Express configuration options Remote Access Configuration Sub-Menu Ipmi Configuration Sub-MenuShows remote access configuration options LAN Configuration Sub-Menu Shows the Ipmi configuration optionsIpmi Configuration Sub-Menu Shows the LAN configuration optionsUSB Configuration Sub-Menu USB Configuration Sub-MenuShows USB configuration options PCIPnP Menu USB Mass Storage Device ConfigurationUSB Mass Storage Device Configuration PCIPnP MenuShows Boot Settings Configuration options Boot MenuBoot Settings Configuration Sub-Menu Boot MenuBoot Device Priority Sub-Menu Boot Device Priority Sub-MenuBoot Settings Configuration Sub-Menu Sheet 2 Shows Boot Device Priority optionsShows Hard Disk Drives options OS Load Timeout Timer Sub-MenuShows OS Load Timeout Timer options Hard Disk Drives Sub-menuChipset Menu OS Load Timeout Timer Sub-MenuShows passwords and security features Security MenuChipset Menu Northbridge Configuration Sub-MenuDescribes the sub-menus used to select chipset features Northbridge Chipset ConfigurationExit Menu Spread Spectrum Clocking Mode Sub-MenuSpread Spectrum Clocking Mode Configuration Exit MenuExit Menu Cmos Checksum BAD Clear Cmos Jumper enabled Error MessagesBios Error Messages Bios Error MessagesSmram Bootblock Initialization Code CheckpointsPost Code Checkpoints Checkpoint DescriptionEarly CPU Init Exit Acpi Runtime Checkpoints DIM Code CheckpointsLists the PCI devices and the bus on which they reside PCI Configuration MapPCI Configuration Map AddressingAMC B2 AMC B1 Fpga Register Legend Symbol DescriptionFpga Registers Extended Post Codes 0081h Fpga Register OverviewPost Codes 0080h Address Action Fpga Version 0A00hVersion Programmable logic version Debug LED 0A01hPCB PCB version Development Features 0A04hFwum 0A02h Fwum Ready Fwum BusyHwmode Holos MS2 MS1 Refalign FCS E3DS3 Telecom Clock Register 0 0A08hTelecom Clock Register 2 0A0Ah Telecom Clock Register 1 0A09hTXREFxSEL2..0 Transmission Clock Frequency Telecom Clock Register 3 0A0BhTransmission Frequency Selection Telecom Clock Register 4 0A0ChUnlock Hldovr SEC10 SEC01 PRI10 PRI01 0xA0D Write ResetTelecom Clock Register 6 0A0Eh Address Function Ipmc AddressesTelecom Clock Register 7 0A0Fh Ipmc Register LegendHT0 SBC Control 00hLtype Ltest Uart Brst PwrBtn usage LED Color Control 06h SBC Status 01hPost Code Low 02h Post Code High 03hAdvancedMC B1 Control & Status 11h AdvancedMC B1 Control & Status 10hAdvancedMC B2 Control & Status 13h AMC B2 Control & Status 12hMcerr HOT Trip VTT Ierr CPU 0 VIDs 18hADC Grab Control 20h VID5 VID4 VID3 VID2 VID1 VID0PCB 3VOC ADC1 and ADC2 Grab Data 21-22hFabric Control 1 24h Fabric Control 2 25h Reset Source 27hDefault configuration connects FWH0 and FWH1 to the ICH Reset Events 29hCrosspoint Switch Control 2Ah Ipmc Post Codes FEh Crosspoint Switch Ports RegisterCrosspoint Switch Data 2Bh Miscellaneous Controls and Status 2DhVersion FFh Address Action FFh Read Reserved Version Write PowerUpIntelligent Platform Management Controller Ipmc Hardware Management OverviewIpmc Block Diagram State M1 Sensor Data Record SDRHardware Sensors Sheet 1 Green to RedHardware Sensors Sheet 2 Hardware Sensors Sheet 3 OEM Name OEM Number Description Hardware Sensors Sheet 4OEM Sensor Types Sensor Sensor Type Specific Event Description Code System Event Log SELOEM Event/Reading Type SEL Events Supported Sheet 1SO/GO SEL Events Supported Sheet 2PCI Serr PCI PerrSEL Events Supported Sheet 3 SEL Events Supported Sheet 4 When name is FIA FRU InitializationOEM SEL Events Supported Sheet 5Sensor Sensor Type Specific Event Description Code Offset ASC-II Ipmb Link SensorField Replaceable Unit FRU Information Variable Size Data Type BytesFRU Customer Area Customizable FRU AreaLinuxCustFru Utility Usage Seecommon Example 1. Input FileAB AC AD AE AF Keying OEM Ipmi CommandsChannel Port Selection Identifiers Reset Bios Flash TypeReset Bios Flash Type Board Device Channel Port Selection IdentifiersResponse SetBoardDeviceChannelPortSelectionSetBoardDeviceChannelPortSelection GetBoardDevicePossibleSelection GetBoardDeviceChannelPortSelectionGetBoardDevicePossibleSelection GetBoardDeviceChannelPortSelectionSet Control State Set Control StateGet Control State Controls Identifier TableFWH Hot Swap ProcessControls Identifier Control Description Control NumberLED Status Meaning Hot Swap LED SignalsAdvancedMC Module Activation Hot Swap LEDPre-Defined Resources for AdvancedMC Modules Temperature and Voltage SensorsSensors and Thresholds Version SDR Dimm Memory Events System Firmware Progress Post ErrorSystem Acpi Power State Processor EventsIpmb Link Sensor ResetReset Actions Reset Action System Function Memory StatusHard Reset Warm ResetIpmc Firmware Code Ipmc Firmware Code Process MPCBL0010 SBC-Hardware Management Overview SOL Implementation Serial Over LAN SOLReferences SOL ArchitectureSOL Block Diagram Serial Over LAN Theory of OperationArchitectural Components Front Panel Serial Port or Rear Transition ModuleSerial Over LAN Client Reference Configuration ScriptSupported Usage Model Configuring the Blade for SOLSOL User Information SOL Configuration Reference Script referencecfgDefault Behavior Reference Script referencecfgChannel Parameters Command Line OptionsSOL Configuration Reference Script Command-line Options SOL ParametersBios Configuration Setting up a Serial Over LAN SessionTarget Blade Setup Change the serial parameter to read Operating System ConfigurationFor Rhel Change the kernel line to readExecute the referencecfg Script Sbcutils RPM InstallationScript executed on the Intel CMM Execute this command to configure SOL on the target bladeFor RedHat* Rhel Configure IP address of the Ethernet port Client Blade SetupConfigure the Ethernet Port Execute this command to restart the networkStart an SOL Session Installing ipmitoolChecking SOL Configuration OEM Ending an SOL SessionOperating Systems for SOL Client ipmitool Telecom Clock Block Diagram of the Telecom ClockFunction Description Interface DescriptionOperational Configuration Recovered Clock SelectionConfiguration Alarm HandlingName Used For Value Enable/Disable Transmission ClockTelecom Clock API Module Transmission Frequency SelectionAutomatic Switchover Values Recovered ClockAutomatic Switchover Automatic Switchover ModePrimary/Secondary Redundant Clock Select Reference ClockReference Frequency for PLL Reference Clock Alignment PLL Operating ModeHardware Reset Corner FrequencyRead New Events Read Alarm StatesHardware Reset Values Alarm State ValuesTelecom Clock API Function Mapping for the sysfs Interface Read the Current Reference ClockSysfs Interface Reference Clock ValuesA10-A1Fh Telecom Clock Registers80h October Technical Product Specification Order Number 171 DRVCLKB1 DRVCLKA1 DRVCLKB0 DRVCLKA0 Addres Action UNLOCK10 UNLOCK01 HLDOVR10 HLDOVR01 SEC10 SEC01 PRI10 PRI01 October Technical Product Specification Order Number 175 Bit Write Read FPGA/PLD Serial Link Bit DefinitionIn-Target Probe ITP MaintenanceDiagnostics SupervisionThermals Power vs. Flow RateComponent Technology For the Americas Warranty InformationReturning a Defective Product RMA Limitation of Liability and Remedies For Europe, Middle East, and Africa EmeaFor Asia and Pacific Apac MPCBL0010 SBC-Warranty Information Sales Assistance Technical Support and Return for Service AssistanceCustomer Support Customer SupportVcci Cisprzz CertificationsJapan Vcci Class B Agency Information-Class BNorth America FCC Class B Korean Class B Australia, New Zealand Safety Warnings Mesures de Sécurité Sicherheitshinweise Norme di Sicurezza Instrucciones de Seguridad Chinese Safety Warning Appendix a Reference Documents MPCBL0010 SBC-Reference Documents Ipmi 1.5 Supported Commands Sheet 1 Appendix B List of Supported Commands Ipmi v1.5 and PicmgFRU Device Commands NetFn Ipmi 1.5 Supported Commands Sheet 2Command NetFn Interface Picmg 3.0 Ipmi Supported Commands
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