Intel 537EX Modem Control Register MCR, Line Control Register LCR, IER Interrupt Enable register

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Parallel Host Interface 16C450/16C550A UART

9.2.4Modem Control Register (MCR)

Figure 17. Modem Control Register (MCR)

Register 4

0

0

0

Loop

Out 2

Out 1

RTS

DTR

 

This register controls the DTE-DCE UART interface.

 

 

Bit 7:5

Not used—These bits are permanently set to ‘0’.

 

 

 

Loop Bit—When set to ‘1’, this bit configures the UART for loopback diagnostic testing. In diagnostic mode,

 

any data that is written to the THR (Transmit Holding register) is looped back to the RBR (Receiver Buffer

 

register).

Bit 4

After writing a data byte to the THR register in loopback mode, the DTE must read the RBR register before

 

writing a new data byte to the THR.

 

Unlike a real 16C450 UART, the modem signals OUT1*, OUT2*, RTS*, and DTR* are not looped back to the

 

MSR register.

 

 

Bit 3

Out 2—This bit, when set to ‘1’ by the DTE, enables the HINT output pin. When set to ‘0’, this bit causes the

HINT pin to be in a high-impedance state.

 

 

 

Bit 2

Out 1—This read/write bit is not used for any specific functions.

 

 

Bit 1

RTS (Request to Send)—This bit when set to ‘1’, indicates that the DTE is ready to send data to the modem.

 

 

Bit 0

DTR (Data Terminal Ready)—When set to ‘1’, this bit indicates that the DTE is read to establish a

communication link.

 

 

 

9.2.5Line Control Register (LCR)

Figure 18. Line Control Register (LCR)

Register 3

DLAB

SBRK

SPAR

EPS

PEN

STB

WLS1

WLS0

This register specifies the asynchronous data communication exchange format. The modem supports up to 10-bit data characters (1 start bit + # of data character bits + parity + # of stop bits).

 

Divisor Latch Access Bit (DLAB)—This bit must be set to ‘1’ to access the divisor latches of the baud rate

Bit 7

generator during a read or write operation. The UART registers 1 and 0 are used for the divisor latches. This

bit must be set to ‘0’ to access the Receiver Buffer register (RBR), the THR (Transmitter Holding register) or

 

 

the IER (Interrupt Enable register).

 

 

 

SBRK (Set Break)—This bit is used to send a long-space disconnect message to the remote modem.

 

The procedure is as follows:

After the THRE bit has been set to ‘1’ by the DCE and before setting the SBRK bit, the DTE needs to write

Bit 6

a NULL ($00h) character to the THR.

The DTE then sets the SBRK bit after the next time the THRE bit is set by the DCE (a long space is now being transmitted).

To return to normal transmission mode, wait for the TEMT to be equal to ‘1’, then reset the SBRK bit.

 

SPAR (Stick Parity)—When this bit is set to ‘1’, stick parity is enabled. When configured for stick parity (SPAR

Bit 5

= 1), even parity (EPS = 1) with parity enable (PEN = 1), then the parity bit is transmitted and checked as a

logic ‘0’. When configured for stick parity (SPAR = 1), odd parity (EPS = 0) and parity enable (PEN = 1) are set

 

 

to ‘1’, then the parity bit is transmitted and checked as a logic ‘1’.

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Intel Confidential

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Contents Developer’s Manual 537EX ChipsetIntel Confidential Contents Figures Tables Date Revision Description Revision History001 Initial release Controllerless Modem Driver Overview IntroductionWindows 95 and Windows Tapi V.90/V.92 and V.34 Data ModesUnimodem Intelsdb.VXDModem Connection Overview DTE-to-DCE Data Rates for Each Mode AT Commands OverviewDCE-to-DCE Data Rates for Each Mode DCE-to-ISP Data Rates for V.90 ModeDelayed Call Sending CommandsDTE-Modem Data Rate Response Codes Numeric TextAT Escape Sequences Command FunctionDial Modifier Dialing digitsCommand Function Default Range Reported By &Vn Data Mode Command SummaryIntel Confidential Intel Confidential Intel Confidential +ESA +EB+ESR +ETBM44/V.42/V.42 bis MNP Command Summary Processes flow control characters and passes to local Fax Class 1 Command Summary Fax Identity Command SummaryVoice DTE→DCE Character Pairs IS-101 Voice Command SummaryResponse Hex Code Function Voice DTE←DCE Character Pairs Voice DTE →DCE Character PairsDEL ESCDial Modifiers Register Function Default Range Units Reported by &VnRegister Summary AsciiRegister Function Default Range Units Modem Responses and Command Echo En, Vn, Xn, Wn, Qn Using AT Commands to Access the S-Registers Sn?, Sn=x, ?Modem Setup Host Modem Response Command Data Reporting Wn Mapping Disable EnableDTE Resets and then configures the modem to Nvram user profile Establishing a Modem Connection A, D, DS = n, S0 AT Commands Product InformationProduct Identification Information Hanging Up Hn, S10, Zn, &D2 Online Command Mode Escape Codes, OnModem-to-Modem Connection Data Rates Intel Confidential Modem-on-Hold Incoming Voice Call in Data Mode Modem-on-Hold Initiating a Voice Call in Data Mode Intel Confidential Carrier Description Supported Modulation TypesLocal Analog Loopback AT&T1 Diagnostic Testing S18, &TnLocal Modem or Test Modem Local Analog Loopback With Self-Test AT&T8Time-Independent Escape Sequence AT Escape SequencesLicensing Requirements for Hayes Escape Sequence Example Command Default Description Data Mode Command DescriptionsHayes* Escape Sequence Host in either online or off-line command mode Previously stored in the Nvram with the AT&Zn=x commandEcho disabled Echo enabledDTE ATI2Sn=x Modem dials a telephone number touch tone dialing CommandNumeric or verbose form Numeric formSubsequent commands to be ignored DisconnectingResets the modem and recalls user profile DCD or Rlsd signalActive Profile AT&V0Stored Profile Telephone NumbersCommand to see the stored telephone number S-register configurations into the Nvram user profile ‘n’Select profile = 0-9 a B C D # * T P R W @Indication Definition Command Default+EB Nrzi encoding and decoding disabled CRC generation and checking disabledSecondary channel operation, and vice versa 12/V.34+ETBM +ESR+GSN +GMR+IFC +ILRR=m+MA? will display a list of enabled alternative modulations +MS command description= carrier,carrier,…carrier If +MS = ,0,, no alternative modulations will be availableBELL103 Carrier DescriptionBELL212 +MS=m See ‘m’+PMHF +PHSW=Value Description +PMHREnable Short Phase 1 and Short Phase Conjunction with the +PSS commandEnable Short Phase Disable short Phase 1 and Short PhaseOperating Modes Mode Features+ES Settings Answer Modem 44/V.42/V.42 bis and MNP Data Modem Command DescriptionsResulting +ES Connection Types +ES=1, 0 +ES=4, 4 +ES=3, 0 +ES=3, 2\Bn \Kn Direction +DR=m+DS=m Max string+EFCS=m 3768Decimal value and the format is as follows Display messages when +ER =+ER=m +ER LapmControl during non-error control operation Setting is ignored if origrqst=6Non-error control operation +ES=mFax Class 1 Commands Fax Identity CommandsFax Identity Command Descriptions +FMFR?/+FMIValue Modulation Speed bps Mod Selection TableClass 1 DTE-Generated Hdlc Frame Information AT+FTH=mod 30 Hdlc Frame Format+FCLASS? Fax Mode Command Descriptions+FCLASS +FRS=m +FRH=m+FTH=m IS-101 Voice Mode AT Commands Dtmf Detection Reporting Voice Mode Command DescriptionsRelay Control +FLO=m +VDR=m See ‘m’ Enable report FunctionCaller ID report Command Reserved Distinctive ringing All Defaults = ‘C’, BB860980, BFE63883, BB863EE0Event Description +VEM=m See ‘m’EX Value BIT Value Event EIGHT-DIGIT HEX Code B B 8 6 3 E EHEX Digit Location 128 Nominal transmit level Local telephone, or speaker+VIP Label Preassigned Voice I/O Labels+VLS=m Relay/Playback Control Voice I/O Primitive CodesPrimitive Code Description +VSD=m See ‘m’ +VRX141 AD3 3-bit Adaptive differential pulse code modulation +VSM=? command to obtain supported sampling rates+VSM=m Range 4800, 7200, 8000, and 11025 samples/secondSerial CmlHard Disk Compression100 Default value 1 second Factory default is ‘0’100 Range 5-255 units of 0.01 seconds+VTS=m None Dual tones may be sent using the following formatSpecified by +VTD=m This sends a 500 ms period of silenceCommand Default Description Register Command Descriptions S10 Escape sequences Range Seconds Default 0 secondsS16 S22 118 S21S25 S30Modem or when a ring signal is detected Modem exits sleep mode whenever the host reads or writes toSleep mode is disabled by setting S33 to ‘0’ Inactive state whenTag Description Caller ID Tags for Formatted ReportingRing Uart Emulation in Intelsdb.VxD Uart Emulation in the Controllerless ModemTHR UartRBR Parallel Host Interface Uart Register Bit Assignments Scratch Register SCR Uart Register DefinitionsModem Status Register MSR OE Overrun Error-Not supported Bit Framing errorLine Status Register LSR StackProcedure is as follows IER Interrupt Enable registerModem Control Register MCR Line Control Register LCRBit Fifo Control Register FCRInterrupt Control Functions Interrupt Identity Register IIRID1 ID0 ID bit 2 for Fifo mode Interrupt Enable Register IERTransmitter Holding Register THR Dlab =Divisor Latch Registers DLM and DLL Receiver Buffer Register RBRProgrammable Data Rates Data Rate Divisor Number Divisor Latch HexFifo Polled Mode Operation Fifo Interrupt Mode Operation16C550A Uart Fifo Operation 102536EX Chipset Developer’s Manual 103

537EX specifications

The Intel 537EX is a powerful and innovative embedded processor designed for a range of applications, particularly in the fields of industrial automation, telecommunications, and transport management systems. This processor is a member of Intel's embedded product line, tailored specifically to meet the demands of systems that require high reliability and long lifecycle support.

One of the main features of the Intel 537EX is its multi-core architecture, which enables efficient parallel processing capabilities. This allows for the execution of multiple tasks simultaneously, significantly improving overall system performance. The processor also incorporates Intel’s advanced power management technology, which ensures that the device consumes energy efficiently, enhances thermal performance, and prolongs the lifespan of the system.

The Intel 537EX supports a range of connectivity options, including high-speed Ethernet and Serial ATA interfaces. This ensures that it can easily integrate into existing systems, seamlessly supporting applications that require robust data transfer capabilities. Additionally, the processor is equipped with multiple I/O ports, facilitating the connection of various peripherals and sensors, which is crucial in industrial applications.

One of the standout technologies within the Intel 537EX is its support for hardware virtualization. This feature allows for the creation of multiple virtual environments within a single physical structure, optimizing resource utilization and enhancing system flexibility. Additionally, Intel’s integrated security technologies provide a significant layer of protection against potential threats, ensuring that embedded systems remain secure.

Another characteristic of the Intel 537EX is its extensive software support, which includes compatibility with various operating systems and development environments. This versatility makes it an attractive choice for developers looking to build or upgrade their embedded systems. With access to Intel's comprehensive software tools, developers can quickly optimize applications to take full advantage of the processor's capabilities.

The Intel 537EX also boasts excellent thermal performance, allowing it to operate efficiently in harsh environments. This is crucial for embedded applications in industrial settings where temperature fluctuations are common. Overall, the Intel 537EX is engineered to deliver high-performance processing power, superior connectivity, and enhanced security, solidifying its position as a reliable choice for demanding embedded applications.