Intel 80L188EC, 80L186EB Related Information, Reserved Functions, Reserved Memory, Reserved I/O

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INTEL 186 EB/EC EVALUATION BOARD USER’S MANUAL

4.6RELATED INFORMATION

All unreserved functions of the processor are available to you, except the Non-Maskable Interrupt (NMI), the Breakpoint instruction (INT 3), the Trap Flag (TF), 16 Kbytes of address space, and 128 bytes of I/O space.

4.6.1Reserved Functions

The Trap Flag and its vector in memory locations 4H–7H are reserved for use by the SSTEP command and BREAKPOINTS.

The NMI pin and its vector in memory locations 8H–0BH are reserved for use by the host interface.

The INT 3 instruction and its vector in memory locations 0CH–0FH are reserved for use by the SSTEP command and BREAKPOINTS.

4.6.2Reserved Memory

On-board Flash memory, as shipped, is 32 Kbytes from address 0H to 7FFFH.

Addresses 0H–3FFH are the interrupt vectors for the processor.

You must not alter the interrupt vectors from 4H–0FH.

Memory locations 400H–415H are reserved for use by the RISM monitor code. You must ensure that no locations in this partition are used by code that is to operate with the RISM. The easiest way of doing this is to generate an ASM-86 module that declares a DATA SEGMENT at 400H that is 22 bytes long. This module can then be linked into the final program to prevent the linker from assigning these registers to another module.

Fourteen words of user stack space must be reserved for use by the iRISM-186 software while the board is processing a host interrupt. The CS:SP register pair is initialized by RISM to 0000H:0800H, providing a total stack size of 501 words before RISM data variables are overwritten. If this is insufficient for your application, your code should alter the SP to a large enough value. Normally, you should write your code to begin at address 800H and download it to Flash memory using iECM-86. You should use any space left beneath your code as data memory.

4.6.3Reserved I/O

The I/O space from 400H–47FH is reserved for use by the host interface.

4-6

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Contents Intel 186 EB/EC Evaluation Board User’s Manual Copyright Intel Corporation Contents Contents Chapter Introduction to the Software Rism Commands Irism VariablesRism Structure TrapisrFigures About This Manual Page Content Overview Chapter About this ManualNotation Conventions ItalicsRelated Documents Document Name Intel Order #FaxBack Service Electronic Support SystemsWorld Wide Web Technical Support Customer Support Telephone NumbersPage Getting Started Page Getting Started Intel 186 EC Evaluation Board Layout System Requirements WHAT’S in Your KITIntel 186 EB/EC Evaluation Board USER’S Manual ECM86 Page Hardware Overview Page Jumper Summary LA19/WRT ProtMicroprocessor PackagingMemory Configuration SramF000FFFF LCD I/OPhysical Memory Map Flash Program Memory Jumper Assembly for Flash Downloading Sram Static Memory Programmable LogicPower Supply E1 JumperSerial Interface InitP2 Serial Channel CTSPin to 9-Pin Adaptor EC Peripheral Expansion Connector JP2 40 pin Expansion InterfaceEB Peripheral Expansion Connector JP2 24 pin CPU Bus Expansion EB and EC LCD Interface LCD Interface DemoPage Introduction to Software Page Software Features Introduction to the SoftwareRestrictions Embedded Controller Monitor ECMUser Interface COM2, -COM1 DiagPOLL, -SIGNAL Reset SYSTEM, RES SYSTEM, RESET, RES6 DOS QuitRelated Information Reserved FunctionsReserved Memory Reserved I/OIECM-86 Commands Page Entering Commands File Operations Loading and Saving Object CodeOther File Operations Include filenameList filename LOG filenameResetting the Target Program ControlBreakpoints BR bpnumber BR bpnumber = codeaddrProgram Execution GO ForeverGO from codeaddr Till codeaddr GO from codeaddr Till codeaddr or codeaddrGO Till codeaddr or codeaddr Program SteppingStep Sstep Displaying and Modifying Program Variables Supported Data TypesByte Commands Byte byteaddress = bytevalueByte byteaddress to byteaddress Word Commands Byte byteaddress to byteaddress = bytevalueWord wordaddress = wordvalue Word wordaddress to wordaddressDword Commands Word wordaddress to wordaddress = wordvalueDword dwordaddress Dword dwordaddress = dwordvalueStack Commands Dword dwordaddress to dwordaddress = dwordvalueStack stackaddress Stack stackaddress to stackaddressString Commands Port CommandsString byteaddress Port portaddress = bytevalueWport Commands Port portaddress to portaddress = bytevalueWport wportaddress Wport wportaddress = wordvalue Wport wportaddress to wportaddressWport wportaddress to wportaddress = wordvalue Processor VariablesPC =codeaddress IRISM-186 Commands Page IRISM Variables Other VariablesRism Commands Rism StructureReceiving Data from the Host Sending Data to the HostSetdataflag Code 00H Transmit Code 02HReadbyte Code 04H Readword Code 05HWritedouble Code 09H Loadaddress Code 0AHReadpc Code 10H Writepc Code 11HTrapisr Reportstatus Code 14HMonitorescape Code 15H Readbport Code 16HWritewport Code 19H Step Code 1AHReadreg Code 1BH Writereg Code 1CHStart Up Commands / or \ Page Parts List Page PIN Header JUMP3 PIN Header JUMP4PIN PWR Conn CN2PMLX Reset PIN SIP SKT SIP14JP1 30 Header HDR2X30XU9 SOP44Intel SO20W20 Header HDR2X20 PNP Transistor SOT23 SMT PNP MMBT2907ALT1 Intel # PA28F400BVTable A-2 EC Board Manual Parts List Sheet 3 Index Index-2

80L188EB, 80C188EC, 80C188EB, 80L186EB, 80C186EB specifications

The Intel 80L188EC, 80C186EC, 80L186EC, 80C186EB, and 80L186EB microprocessors represent a significant evolution in Intel's 16-bit architecture, serving various applications in embedded systems and computing during the late 1980s and early 1990s. These microprocessors are designed to offer a blend of performance, efficiency, and versatility, making them suitable for a range of environments, including industrial control, telecommunications, and personal computing.

The Intel 80L188EC is a member of the 186 family, notable for its low-power consumption and integrated support for a range of peripheral devices. It operates at clock speeds of up to 10 MHz and features a 16-bit architecture, providing a balance of processing power and energy efficiency. The 80C186EC, on the other hand, is a more advanced version, offering enhanced performance metrics with faster clock speeds and improved processing capabilities, making it ideal for applications that require more computational power.

The 80L186EC shares similarities with the 80L188EC but is enhanced further for various low-power applications, especially where battery life is crucial. With a maximum clock speed of 16 MHz, it excels in scenarios demanding energy-efficient processing without sacrificing performance.

In contrast, the 80C186EB and 80L186EB are optimized versions that bring additional features to the table. The 80C186EB operates at higher clock speeds, coupled with an extended instruction set, enabling it to handle more complex tasks and run sophisticated software. These enhancements allow it to serve well in environments that require reliable performance under load, such as data acquisition systems or advanced control systems.

The 80L186EB is tailored for specific low-power scenarios, integrating Intel's sophisticated low-power technologies without compromising on speed. Utilizing advanced process technologies, these chips benefit from reduced heat output and extended operating life, a significant advantage in embedded applications.

Overall, these microprocessors showcase Intel's commitment to innovation in 16-bit processing, marked by their varying capabilities and power profiles tailored to meet the demands of diverse applications, from industrial systems to consumer electronics. Their legacy continues to influence subsequent generations of microprocessor designs, emphasizing performance, energy efficiency, and versatile applications in computing technology. As such, the Intel 80C186 and 80L188 families play a crucial role in understanding the evolution of microprocessor technology.
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