Intel IQ80332 manual Jumper Summary, Connector Summary, General Purpose Input/Output Header

Page 39

Intel® IQ80332 I/O Processor

Hardware Reference Section

3.9.3Jumper Summary

Table 17.

Jumper Summary

 

 

 

 

 

 

Jumper

Description

Factory Default

 

 

 

 

 

J1C1

JTAG Chain Enable

1-2

 

 

 

 

 

J1D2

Disables UART

Open

 

 

 

 

 

J7B4

SM_SCLK to EEPROM, SM_SDTA to EEPROM

1-2, 3-4

 

 

 

 

 

J7D1

16-bit Flash Enable

Open

 

 

 

 

 

J9D3

Buzzer Volume

Open

 

 

 

 

3.9.4Connector Summary

Table 18.

Connector Summary

 

 

 

 

Connector

Description

 

 

 

 

J1D1

RJ45 Network Connector for GbE NIC.

 

 

 

 

J1E1

RJ11 Dual Serial Port Connector.

 

 

 

 

J1L1, J1M1,

 

 

J1M2, J1N1,

SMA connectors

 

J2M1, J2M2

 

 

 

 

 

J1R1

Secondary PCI-X Expansion bus Slot

 

 

 

 

J2A1

Secondary PCI-X Expansion bus Slot.

 

 

 

 

J2D1

Power header for fan.

 

 

 

 

J2D2

GPIO tap-in Header

 

 

 

 

J1B1, J5D1,

Test headers

 

J5C1

 

 

 

J2E1

Edge connector for primary PCI Express Bus.

 

 

 

 

J5B1

DIMM

 

 

 

 

J7A1

PC104 Mod connector.

 

 

 

 

J7B1, J7B2

I2C 4 pin connectors.

 

J7B3

Secondary PCI-X Expansion Slot Power. Please see Section 2.2.2, “Power Requirements”

 

for more details

 

 

 

J7C1

Test header (empty)

 

 

 

 

J7D2

JTAG CPLD Header.

 

 

 

 

J9D1

Power header for battery.

 

 

 

3.9.5General Purpose Input/Output Header

The following table in Section 19, “J2D2 GPIO Header Definition” on page 39 shows the GPIO signal assignments. The GPIO signals are muxed with the serial port signals. The serial port must be disabled to use the GPIO signals. These pins corespond to Jumer J2D2.

Table 19.

J2D2 GPIO Header Definition

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin

Signal

 

Pin

Signal

Pin

Signal

 

 

 

 

 

 

 

 

 

1

GND

 

4

GPIO5

7

GPIO2

 

 

 

 

 

 

 

 

 

2

GPIO7

 

5

GPIO4

8

GPIO1

 

 

 

 

 

 

 

 

 

3

GPIO6

 

6

GPIO3

9

GPIO0

 

 

 

 

 

 

 

 

Evaluation Platform Board Manual

39

Image 39
Contents Evaluation Platform Board Manual Intel IQ80332 I/O ProcessorIntel IQ80332 I/O Processor Evaluation Platform Board Manual Contents 6.3 2.2 Figures Examples Revision History Date Revision Description001 Initial Release Other Related Documents Document Purpose and ScopeComponent Reference Electronic InformationComponent References Electronic InformationTerms and Definitions Terms and DefinitionsDefinition Intel 80332 I/O Processor 231 Feature Definition Summary of FeaturesKit Content Hardware InstallationFirst-Time Installation and Test Power Requirements Supported Tool Buckets Factory SettingsContents of the Flash Development StrategyTarget Monitors RedHat RedBootHost Communications Examples Serial-UART CommunicationJtag Debug Communication Network Communication Example Network CommunicationGNUPro GDB/Insight Communicating with RedBootIntel IQ80332 I/O Processor GDB set remotebaud Connecting with GDBThis Page Left Intentionally Blank Target Market Functional DiagramBoard Form-Factor/Connectivity Form-Factor/Connectivity FeaturesPower Features PowerMemory Subsystem Battery BackupFlash Memory Requirements Flash Memory RequirementsInterrupt Routing External Interrupt Routing to Intel 80332 I/O ProcessorInterrupt System Resource 80332 populates the peripheral bus as depicted by Figure Peripheral Bus FeaturesFlash ROM Flash ROM FeaturesAudio Buzzer Rotary SwitchUart Non-Volatile RAMBattery Status Battery Status Buffer RequirementsRead Name Description Write Console Serial Port Debug InterfaceJtag Debug Jtag PortJtag Port Pin-out Reset Requirements/Schemes Board Reset SchemeSwitch Summary Switches and JumpersSwitch Summary Default Switch Settings of S7A1- VisualConnector Summary Jumper SummaryGeneral Purpose Input/Output Header Switch S8A1 Rotary Detail Descriptions of Switches/JumpersSwitch S1C2 80332 Reset Switch S6A1 BPCI-X ResetS7A1-4 PCI-X Bus B Speed Enable Settings and Operation Mode Switch S7A1-3 Retry Settings and Operation ModeS7A1-8 Operation Mode S7A1-9 Operation ModeS7A1-10 Operation Mode Jumper J7D1 Flash bit-width Jumper J1C1 Jtag ChainJumper J1D2 Uart Control Jumper J7B4 SMBus Header Jumper J9D3 Buzzer Volume ControlComponents on the Peripheral Bus DramSoftware Reference Address Range in Hex Size Data Bus Width Description Peripheral Bus Memory MapIntel 80332 I/O Processor Memory Map Board Support Package BSP ExamplesRedBoot* Intel 80332 I/O Processor Memory Map RedBoot Intel 80332 I/O Processor FilesVirtual Address Physical Address Size Description RedBoot 80332 DDR Memory Initialization Sequence IQ80321 and IQ80332 Comparisons This Page Left Intentionally Blank Purpose IntroductionRelated Web Sites Hardware Setup SetupSoftware Flow Diagram Software SetupCreating a New Project New Project SetupConfiguration Overview Flashing with JtagUsing Flash Programmer Building an Executable File From Example Code Debugging Out of FlashLaunching and Configuring Debugger Running the CodeLab DebuggerManually Loading and Executing an Application Program Displaying Source Code Using BreakpointsStepping Through the Code Setting CodeLab Debug OptionsExploring the CodeLab Debug Windows Registers Window Watch WindowVariables Window Hardware Breakpoints Debugging BasicsHardware and Software Breakpoints Software Breakpoints3 C.9.3 Exceptions/Trapping

IQ80332 specifications

The Intel IQ80332 is a high-performance microprocessor designed primarily for embedded applications, showcasing Intel's commitment to delivering powerful computing solutions for a variety of industries. Launched as part of Intel’s post-Pentium architecture, the IQ80332 is built on a robust architecture that combines efficiency with advanced performance capabilities, making it particularly suitable for industrial, telecommunications, and networking environments.

One of the standout features of the IQ80332 is its support for wireless communication technologies, providing seamless connectivity options for embedded devices. The chip integrates advanced power management features, enabling it to operate efficiently, which is crucial for systems that demand low power consumption without sacrificing performance.

The processor is built on a scalable architecture that supports a wide range of applications, from simple control operations to complex data processing tasks. It has a diverse instruction set, allowing developers to leverage a variety of programming paradigms for optimizing application performance. This versatility makes the IQ80332 a preferred choice for developers looking to build sophisticated embedded systems.

Another key characteristic of the IQ80332 processor is its robust security features. It includes hardware-level security measures that help protect sensitive data and maintain system integrity—an essential requirement in today’s connected environments where cyber threats are prevalent.

Additionally, the Intel IQ80332 supports multiple system interfaces, allowing for easy integration with various peripherals. Its compatibility with industry-standard buses makes it an ideal choice for upgrading existing systems without extensive redesign efforts.

Moreover, the chip is capable of running multiple operating systems, which provides developers with flexibility in choosing the best software platforms for their applications. This multitasking ability contributes to its efficiency, making it a noteworthy contender in the embedded processing market.

In summary, the Intel IQ80332 microprocessor is characterized by high performance, low power consumption, and robust security features. Its versatility, combined with advanced connectivity options and strong support for multiple operating systems, makes it a valuable asset in the development of next-generation embedded systems across a multitude of sectors. As industries continue to evolve, the IQ80332 remains a compelling solution for engineers and developers seeking reliable and efficient computing power.