7) Timing chart
POWER |
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| T2 T3 |
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DATA |
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/STB |
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BUSY |
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T1 | T4 | T5 | T6 |
/ACK |
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T1 = 3500msec (Max) | T4 = 500nsec (Max) |
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T2, T3 = 500nsec (Min) | T5, T6 | = 4microsec(TYP) |
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8) Receive control
When BUSY signal stays at LOW, it is feasible to receive data from host computer. But not feasible when BUSY signal stays at HIGH.
3.2 Serial interface
1)Synchronization : Asynchronous
2)Transmission speed: 4800, 9600, 19200, 38400bps (user selectable)
3)A word consists of
Start bit | : 1bit |
Data bit | : 7 or 8 bit (user selectable) |
Parity bit | : odd, even or no parity (user selectable) |
Stop bit | : more than 1 bit |
4)Signal polarity
Mark | = | Logic “1” |
Space | = | Logic “0” (+3V |
5) Receive data (RD signal) |
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Mark | = | 1 |
Space | = | 0 |
6)Reception control (DTR signal)
Mark | = | 1 |
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Space | = | 0 |
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7) Transmission control (TD signal) |
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DC1, [11]h | XON: | Enable data receiving | |
DC3, [13]h | XOFF: | Disable data receiving | |
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