Quatech DS-102 user manual VI. Serial Port Functional Description

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VI. SERIAL PORT FUNCTIONAL

DESCRIPTION

This section contains information intended for advanced users planning to do custom programming with the DS-102. The information presented here is a technical description of the interface to the 16450 or 16550 UART.

The 16450 UART is an improved functional equivalent of the 8250 UART, performing serial-to-parallel conversion on received data and parallel-to-serial conversion on output data. Designed to be compatible with the 16450, the 16550 UART enters character (non-FIFO) mode on reset. In this mode, the 16550 appears as a 16450 to application software.

An additional mode, FIFO mode, can be invoked through software to reduce CPU overhead. FIFO mode increases performance by providing two 16-byte hardware buffers, one for transmit and one for receive. This can reduce the frequency of interrupts issued to the CPU by the UART.

Other features of the 16450 and 16550 include:

Programmable baud rate, character length, parity, and number of stop bits.

Automatic control of start, stop, and parity bits. Independent and prioritized interrupts.

Transmit clock output / receive clock input.

The DS-102's serial ports are controlled by the 16450 or 16550 UARTs labeled U7 and U8. The serial ports will generate interrupts in accordance with the bits set in the interrupt enable register of the UARTs. In order to maintain compatibility with earlier personal computer systems, the user-defined output OUT2 is used as an external interrupt enable and must be set active for interrupts to be acknowledged. OUT2 is accessed through the UART's MODEM control register.

The following pages provide a brief summary of the internal registers available within the 16450 and 16550 UARTs. Registers and functions specific to the 16550 will be indicated with boldface italic notations.

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Quatech DS-102 User's Manual

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Contents DS-102 Page IV. Setting Interrupt Levels Irqs VII. Specifications VIII. TroubleshootingTable of Contents External Connections VI. Serial Port Functional DescriptionPage Date of Purchase Model Number Page General Information Port Address IRQ Enabled ? Diagram of DS-102 Setting the address Examination of a serial port base addressSerial 1 uses SW1 Serial 2 uses SW2 Enabling or disabling ports Recommended addresses for serial portsThis page intentionally left blank Serial Interrupt Sharing Channel Connection Interrupt OperationExternal Connections J7 -- Serial J8 -- Serial DS-102 connector definitions for RS-232-C This page intentionally left blank VI. Serial Port Functional Description Accessing the Serial Port registers DlabInterrupt Enable Register Interrupt Identification RegisterInterrupt Identification Register bit definitions Fifo Control Register 16550 only RXT0Line Control Register Stkp EPS PEN ParityModem Control Register Are being usedLine Status Register Line Status Register bit definitionsModem Status Register Scratchpad RegisterFifo Interrupt Mode Operation 16550 Uart only When the receiver Fifo and receiver interrupts are enabledFifo polled mode operation 16550 Uart only Factory default Baud Rate Selection026 VII. Specifications 16450 16550 optionalComputer will not boot up