6.SERIAL PORT FUNCTIONAL DESCRIPTION
This section contains information intended for advanced users planning to do custom programming with the ES-100D. The information presented here is a technical description of the interface to the 16450 or 16550 UART.
The 16450 UART is an improved functional equivalent of the 8250 UART, performing serial-to-parallel conversion on received data and parallel-to-serial conversion on output data. Designed to be compatible with the 16450, the 16550 UART enters character (non-FIFO) mode on reset. In this mode, the 16550 appears as a 16450 to application software.
An additional mode, FIFO mode, can be invoked through software to reduce CPU overhead. FIFO mode increases performance by providing two
16-byte hardware buffers, one for transmit and one for receive. This can reduce the frequency of interrupts issued to the CPU by the UART.
Other features of the 16450 and 16550 include:
Programmable baud rate, character length, parity, and number of stop bits.
Automatic control of start, stop, and parity bits. Independent and prioritized interrupts.
Transmit clock output / receive clock input.
The ES-100D's serial ports are controlled by 16450 or 16550 UARTs. The serial ports will generate interrupts in accordance with the bits set in the interrupt enable register of the UARTs. In order to maintain compatibility with earlier personal computer systems, the user-defined output OUT2 is used as an external interrupt enable and must be set active for interrupts to be generated. OUT2 is accessed through the UART's MODEM control register.
The following pages provide a brief summary of the internal registers available within the 16450 and 16550 UARTs. Registers and functions specific to the 16550 will be indicated with boldface italic notations.