Quatech ES-100 user manual General Information

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1.GENERAL INFORMATION

The Quatech, Inc. ES-100D provides eight RS-232 asynchronous serial communication interfaces for IBM-compatible personal computer systems using the 16-bit ISA (Industry Standard Architecture) expansion bus.

The ES-100D's serial ports are implemented using 16450 Universal Asynchronous Receiver/Transmitters (UARTs). For higher performance, 16550 UARTs can be installed in place of the 16450 UARTs. The 16550 contains a hardware buffer that reduces processing overhead. Software must be aware of the 16550 UART for the device's extra capabilities to be used, otherwise it will act as a 16450 UART. The 16550 is suggested for multitasking environments and for applications involving high data rates.

The ES-100D is highly flexible with respect to addressing and interrupt level use. The serial ports are addressed in a contiguous block that can be placed anywhere within the range of 0000 hex to FFFF hex, and available interrupt levels include IRQ2 to IRQ7, IRQ10 to IRQ12, IRQ14, or IRQ15.

All ports on the ES-100D share one interrupt level. A special interrupt status register is provided to allow controlling software to manage the shared interrupt level. The shared interrupt feature minimizes the system resources consumed by the adapter.

In order to support the use of the shared interrupt feature of the ES-100D, Quatech has developed device drivers for several popular operating systems and environments. The sales department can be contacted for details on current offerings.

Quatech ES-100D User's Manual

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Contents ES-100 Page Warranty Information Page EC Council Directive 89/336/EEC FCC Class BGeneral Information Installation Port Address IRQDiagram of ES-100D Setting the address Addressing PortsExamination of a serial port base address Interrupt Level IRQ Interrupt SharingInterrupt Status register Interrupt Status Register contents This page intentionally left blank External Connections Channel Output Configuration ES-100D connector definitionsES-100D output connectors Serial Port Functional Description Accessing the Serial Port registers DlabInterrupt Enable Register Interrupt Identification RegisterInterrupt Identification Register bit definitions Fifo Control Register 16550 only RXT0Line Control Register EPS PEN ParityModem Control Register Modem Control Register bit definitionsLine Status Register Line Status Register bit definitionsModem Status Register Scratchpad RegisterFifo Interrupt Mode Operation 16550 Uart only When the receiver Fifo and receiver interrupts are enabledFifo polled mode operation 16550 Uart only Baud Rate Selection Value Values %Specifications 16450 16550 optionalTroubleshooting Computer will not boot upVersion March Quatech Inc, ES-100 Manual