Texas Instruments TLV320AIC3107EVM-K quick start Left AGC Settings

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TLV320AIC3107EVM Software

Figure 12. Left AGC Settings

Figure 13. Advanced

Noise gate functions, such as Hysteresis, Enable Clip stepping, Threshold (dB), Signal Detect Debounce (ms), and Noise Detect Debounce (ms) are set using the corresponding controls in the Noise Gate groupbox for each channel.

SLAU261–November 2008

TLV320AIC3107EVM-K

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Contents TLV320AIC3107EVM-K EVM-Compatible Device Data SheetsUSB-MODEVM SW2 Settings Introduction FeaturesTLV320AIC3107EVM-K Block Diagram EVM OverviewUSB-MODEVM Interface Board TLV320AIC3107EVM-K Block DiagramList of Stand-alone Jumpers Default Configuration and ConnectionsUSB-MODEVM SW2 Settings 2 TLV320AIC3107EVM Jumpers and SwitchesPower Connections Software Installation TLV320AIC3107EVM-K Setup and InstallationEVM Connections TLV320AIC3107EVM Software Quick Start USB-MODEM ConfigurationsQuick Start Tabs Quick Start Preset Configurations Tab Quick Start Preset ConfigurationsMain Software Screen Main Software Screen With Indicators and FunctionsDetailed TLV320AIC3107 Block Diagram Audio Input/ADC Tab Audio Input/ADC TabBypass Paths Tab Bypass Paths TabAudio Interface Tab Audio Interface TabClocks Tab Configuring the Codec Clocks and Fsref CalculationUse Without PLL Setting ADC and DAC Sampling RatesUse With PLL GPIO1 Tab GPIO1 TabAGC Tab AGC TabLeft AGC Settings Filters Tab Filters TabHigh-Pass Filter ADC FiltersDigital Effects Filter ADC De-emphasis Filters DAC FiltersDAC Digital Effects Filter Shelf Filters Digital Effects FiltersAnalog Simulation Filters EQ FiltersUser Filters Preset Filters3.6 3D Effect 10 DAC/Line Outputs TabLine Output Mixers DAC ControlsOutput Stage Configuration Tab HP Output Stage Configuration TabHP Outputs Tab High Power Outputs TabClass-D Output Tab Class-D Output TabCommand Line Interface Tab Command Line Interface TabFile Menu Table A-1. Analog Input/Output Connectors Appendix a EVM Connector DescriptionsAnalog Interface Connectors Analog Input/Output ConnectorsTable A-2. Block a and Block B Digital Interface Pinout Block a and Block B Digital Interface Connectors J16 and J17Table A-3. Power Supply Pinout Power Supply Connector Pin Header, J15TP4 Avdd DAC Appendix B TLV320AIC3107EVM SchematicAppendix B Appendix C TLV320AIC3107EVM Layout Views Figure C-1. Assembly layerFigure C-3. Layer Figure C-5. Bottom Layer Table D-1. TLV320AIC3107EVM Bill of Materials Appendix D TLV320AIC3107EVM Bill of MaterialsNot Appendix E USB-MODEVM Schematic Ti a HIGH-PERFORMANCE Analog Division Table F-1. USB-MODEVM Bill of Materials Appendix F USB-MODEVM Bill of MaterialsDesignators Description Manufacturer Table G-1. USB Control Endpoint Hidsetreport Request Table G-2. Data Packet ConfigurationAppendix G USB-MODEVM Protocol USB-MODEVM Protocol0x12 0xA0 0x02 0x05 0xAA 0x55 0x01 0xA0 0x02 0x05 Table G-3. Gpio Pin Assignments Gpio CapabilityWriting Scripts Writing Scripts FCC Warning Evaluation BOARD/KIT Important NoticeImportant Notice