Texas Instruments TLV320AIC3107EVM-K quick start Gpio Capability, Table G-3. Gpio Pin Assignments

Page 51

www.ti.com

GPIO Capability

G.2 GPIO Capability

The USB-MODEVM has seven GPIO lines. Access them by specifying the interface to be 0x08, and then using the standard format for packets—but addresses are unnecessary. The GPIO lines are mapped into one byte (see Table G-3):

Table G-3. GPIO Pin Assignments

Bit 7

6

5

4

3

2

1

0

x

P3.5

P3.4

P3.3

P1.3

P1.2

P1.1

P1.0

Example: write P3.5 to a 1, set all others to 0:

[0]0x18 --> write, GPIO

[1]0x00 --> this value is ignored

[2]0x01 --> length - ALWAYS a 1

[3]0x00 --> this value is ignored

[4]0x40 --> 01000000

The user may also read back from the GPIO to see the state of the pins. Let's say we just wrote the previous example to the port pins.

Example: read the GPIO

[0]0x08 --> read, GPIO

[1]0x00 --> this value is ignored

[2]0x01 --> length - ALWAYS a 1

[3]0x00 --> this value is ignored

The return packet should be:

[0]0x28

[1]0x00

[2]0x01

[3]0x00

[4]0x40

SLAU261–November 2008

USB-MODEVM Protocol

49

Submit Documentation Feedback

Image 51
Contents TLV320AIC3107EVM-K EVM-Compatible Device Data SheetsUSB-MODEVM SW2 Settings Introduction FeaturesTLV320AIC3107EVM-K Block Diagram EVM OverviewUSB-MODEVM Interface Board TLV320AIC3107EVM-K Block DiagramList of Stand-alone Jumpers Default Configuration and ConnectionsUSB-MODEVM SW2 Settings 2 TLV320AIC3107EVM Jumpers and SwitchesPower Connections TLV320AIC3107EVM-K Setup and Installation Software InstallationEVM Connections Quick Start USB-MODEM Configurations TLV320AIC3107EVM SoftwareQuick Start Tabs Quick Start Preset Configurations Tab Quick Start Preset ConfigurationsMain Software Screen Main Software Screen With Indicators and FunctionsDetailed TLV320AIC3107 Block Diagram Audio Input/ADC Tab Audio Input/ADC TabBypass Paths Tab Bypass Paths TabAudio Interface Tab Audio Interface TabClocks Tab Configuring the Codec Clocks and Fsref CalculationSetting ADC and DAC Sampling Rates Use Without PLLUse With PLL GPIO1 Tab GPIO1 TabAGC Tab AGC TabLeft AGC Settings Filters Tab Filters TabADC Filters High-Pass FilterDigital Effects Filter ADC DAC Filters De-emphasis FiltersDAC Digital Effects Filter Shelf Filters Digital Effects FiltersAnalog Simulation Filters EQ FiltersUser Filters Preset Filters3.6 3D Effect 10 DAC/Line Outputs TabLine Output Mixers DAC ControlsOutput Stage Configuration Tab HP Output Stage Configuration TabHP Outputs Tab High Power Outputs TabClass-D Output Tab Class-D Output TabCommand Line Interface Tab Command Line Interface TabFile Menu Table A-1. Analog Input/Output Connectors Appendix a EVM Connector DescriptionsAnalog Interface Connectors Analog Input/Output ConnectorsTable A-2. Block a and Block B Digital Interface Pinout Block a and Block B Digital Interface Connectors J16 and J17Table A-3. Power Supply Pinout Power Supply Connector Pin Header, J15TP4 Avdd DAC Appendix B TLV320AIC3107EVM SchematicAppendix B Appendix C TLV320AIC3107EVM Layout Views Figure C-1. Assembly layerFigure C-3. Layer Figure C-5. Bottom Layer Table D-1. TLV320AIC3107EVM Bill of Materials Appendix D TLV320AIC3107EVM Bill of MaterialsNot Appendix E USB-MODEVM Schematic Ti a HIGH-PERFORMANCE Analog Division Table F-1. USB-MODEVM Bill of Materials Appendix F USB-MODEVM Bill of MaterialsDesignators Description Manufacturer Table G-1. USB Control Endpoint Hidsetreport Request Table G-2. Data Packet ConfigurationAppendix G USB-MODEVM Protocol USB-MODEVM Protocol0x12 0xA0 0x02 0x05 0xAA 0x55 0x01 0xA0 0x02 0x05 Table G-3. Gpio Pin Assignments Gpio CapabilityWriting Scripts Writing Scripts FCC Warning Evaluation BOARD/KIT Important NoticeImportant Notice