Texas Instruments TLV320AIC3107EVM-K quick start Use Without PLL, Use With PLL

TLV320AIC3107EVM Software www.ti.com

4.6.1.1Use Without PLL

Setting up the TLV320AIC3107 for clocking without using the PLL permits the lowest power consumption by the codec. The CLKDIV_IN source can be selected as either MCLK (default) or BCLK. The CLKDIV_IN frequency then is entered into the CLKDIV_IN box, in megahertz (MHz). The default value shown,

11.2896 MHz, is the frequency used on the USB-MODEVM board. This value then is divided by the value of Q, which can be set from 2 to 17; the resulting CLKDIV_OUT frequency is shown in the indicator next to the Q control. The result frequency is shown as the Actual Fsref.

4.6.1.2Use With PLL

When PLLDIV_OUT is selected as the codec clock source, the PLL is used. The PLL clock source is chosen using the PLLCLK_IN control, and can be set to either MCLK or BCLK. The PLLCLK_IN frequency then is entered into the PLLCLK_IN Source box.

The PLL_OUT and PLLDIV_OUT indicators show the resulting PLL output frequencies with the values set for the P, K, and R parameters of the PLL. See the TLV320AIC3107 data sheet for an explanation of these parameters. The parameters can be set by clicking on the up/down arrows of the P, K, and R combination boxes, or they can be typed into these boxes.

Use the Search for PLL Settings Based on Desired Fsref and PLLCLK_IN section to find the ideal values of P, K, and R for a given PLL input frequency and desired Fsref:

1.Set the desired Fsref using the Fsref switch.

2.Verify that the correct reference frequency is entered into the PLLCLK_IN Source box in megahertz (MHz)

3.Push the Search for Ideal PLL Settings button. The software starts searching for ideal combinations of P, K, and R, which achieve the desired Fsref. The possible settings for these parameters are displayed in the spreadsheet-like table labeled Possible Settings.

4.Click on a row in this table to select the P, K, and R values located in that row. Notice that when this is done, the software updates the P, K, R, PLL_OUT and PLLDIV_OUT readings, as well as the Actual Fsref and Error displays. The values show the calculations based on the values that were selected. This process does not actually load the values into the TLV320AIC3107, however; it only updates the displays in the software. If more than one row exists, the user can choose the other rows to see which of the possible settings comes closest to the ideal settings.

When a suitable combination of P, K, and R has been chosen, pressing the Load Settings into Device? button downloads these values into the appropriate registers on the TLV320AIC3107.

4.6.1.3Setting ADC and DAC Sampling Rates

The Fsref frequency that determines either enabling or bypassing the PLL (see Section 4.6.1.1 or Section 4.6.1.2) is used to determine the actual ADC and DAC sampling rates. By using the NADC and NDAC factors, the sampling rates are derived from the Fsref. If the dual-rate mode is desired, this option can be enabled for either the ADC or DAC by pressing the corresponding Dual Rate Mode button. The ADC and DAC sampling rates are shown in the box to the right of each control.

16 TLV320AIC3107EVM-K SLAU261–November 2008

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